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NJU6543 查看數據表(PDF) - Japan Radio Corporation

零件编号
产品描述 (功能)
生产厂家
NJU6543
JRC
Japan Radio Corporation  JRC
NJU6543 Datasheet PDF : 29 Pages
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NJU6543 Preliminary
Display ON/OFF
SC
0
1
Display ON/OFF
OFF
ON
When Display OFF
All segment and common terminal output VSS
(When general purpose output ports are selected, even Display OFF, these ports can output data)
Suspending Oscillation (but, if RSTb="L", oscillator works)
V1 , V2 and V3 become “H” (no current pass through the bleeder resistors)
Even during Display OFF, interface can be accessed, and data can be written into the command register,
address counter and data register.
(5) Output Address Counter
Output Address Counter will specify the addresses of the SEG and COM drivers for the display data.
When the MSB (D7 to D6) of the 1st data is “01”, the LSB 6 bits (D5 to D0) specify the addresses of COM and
SEG drivers, and the 2nd data is the display data which will be sent to the 1st-data-specified drivers. At the
same time, SEG and COM driver addresses will be increased automatically shown in Table 1. In other words,
as of the SEG and COM driver addresses specified by the first data in the Output Address Counter, display
data can be transferred to the SEG and COM drivers without further address setting.
The address setting range is from "000000" to "111111". if the data transferred additionally , then it will be
reset to “000000” and renew the auto-increment operation.
Address Data
D7
D6
D5
D4
D3
D2
D1
D0
0
1
C1
C0
S3
S2
S1
S0
Flag bits
COM driver Address
SEG driver Address
-8-
Ver.2008-11-28

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