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BS62LV1023JC-70 查看數據表(PDF) - Brilliance Semiconductor

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BS62LV1023JC-70
BSI
Brilliance Semiconductor BSI
BS62LV1023JC-70 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
BSI
BS62LV1023
„ AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc=3.0V )
WRITE CYCLE
JEDEC
PARAMETER
NAME
tAVAX
PARAMETER
NAME
tWC
DESCRIPTION
Write Cycle Time
BS62LV1023-70
MIN. TYP. MAX.
70
--
--
t
E1LWH
t
CW
Chip Select to End of Write
70
--
--
tAVWL
tAS
Address Set up Time
0
--
--
t
AVWH
t
AW
Address Valid to End of Write
70
--
--
tWLWH
tWP
Write Pulse Width
50
--
--
tWHAX
tWR1
Write Recovery Time
(CE1 , WE)
0
--
--
t
E2LAX
t
WR2
Write Recovery Time
(CE2) 0
--
--
tWLOZ
tWHZ
Write to Output in High Z
0
--
30
t
DVWH
t
DW
Data to Write Time Overlap
30
--
--
t
WHDX
t
DH
Data Hold from Write Time
0
--
--
t
GHOZ
t
OHZ
Output Disable to Output in High Z
0
--
30
t
WHQX
t
OW
End of Write to Output Active
5
--
--
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE1 (1)
ADDRESS
OE
CE1
CE2
WE
D OUT
D IN
R0201-BS62LV1023
t WC
(11)
t CW
(5)
(3)
t WR1
t AS
(4,10)
t OHZ
(5)
t AW
(11)
t CW
t WP
(2)
t DW
t WR2
(3)
t DH
6
Revision 2.2
April 2001

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