ADM5180JP 查看數據表（PDF） - Analog Devices

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ADM5180JP

Octal, RS-232/RS-423 Line Receiver

Analog Devices 

ADM5180

PIN CONFIGURATIONS

DIP

A– 1

A+ 2

AO 3

B– 4

28 VDD

27 HO

26 H+

25 H–

B+ 5

24 GO

BO 6

23 G+

FS1 7 ADM5180 22 G–

TOP VIEW

C– 8 (Not to Scale) 21 FS2

C+ 9

20 FO

CO 10

19 F+

D– 11

18 F–

D+ 12

DO 13

GND 14

17 EO

16 E+

15 E–

PLCC

4 3 2 1 28 27 26

B+ 5

BO 6

FS1 7

C– 8

C+ 9

CO 10

D– 11

ADM5180

TOP VIEW

(Not to Scale)

25 H–

24 GO

23 G+

22 G–

21 FS2

20 FO

19 F+

12 13 14 15 16 17 18

APPLICATIONS INFORMATION

FAILSAFE OPERATION

The ADM5180 provides a failsafe operating mode to guard against

input fault conditions as defined in RS-422A and RS-423A

standards. The fault conditions are (1) Driver in power-off

condition, (2) Receiver not interconnected with Driver, (3) Open-

circuited interconnecting cable, and (4) Short-circuited intercon-

necting cable. If any of these four fault conditions occurs at the

inputs of a receiver, then the output of that receiver is driven to a

known logic level. The failsafe level is programmed using the

failsafe (FS) input. There are two failsafe inputs, FS1 and FS2

which each control four receivers. FSI controls receivers A . . . D

and FS2 controls receivers E . . . H. A connection to VDD on the

failsafe input sets the output high under fault conditions while a

connection to GND sets the output low.

FS1, FS2

VDD

GND

Output During Fault Condition

High

Low

Input Filtering

The ADM5180 contains internal low pass filtering for additional

noise rejection. Frequencies above the passband will be rejected.

For the specified input (5.5 MHz at ±500 mV) the input stage

attenuates the signal such that the threshold levels are not reached

and therefore no change of state occurs on the output. The filtering

is a function of both amplitude and and frequency. As the signal

amplitude decreases then the rejected frequency will decrease.

Mnemonic

VDD

GND

A+ . . . H+

A– . . . H–

AO . . . HO

FS1, FS2

PIN DESCRIPTION

Function

Power Supply Input, 5 V ± 5%.

Ground Pin. Must be connected to 0 V.

Noninverting Input to Differential Receivers

A to H.

Inverting Input to Differential Receivers A to H.

Receiver Outputs A to H.

A through D and FS2 controls receivers

E through H.

Failsafe Control Inputs. FS1 controls receivers

A through D and FS2 control Receiver

E through H.

–4–

REV. 0

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