PCA9557 查看數據表（PDF） - Philips Electronics
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PCA9557 Datasheet PDF : 16 Pages
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Philips Semiconductors
8-bit I2C and SMBus I/0 port with reset
Product data
PCA9557
DEVICE ADDRESS
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9557 is
shown in Figure 6. To conserve power, no internal pullup resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
slave address
0 0 1 1 A2 A1 A0 R/W
fixed
programmable
su01048
Figure 6. PCA9557 address
The last bit of the slave address defines the operation to be
performed. When set to logic 1 a read is selected while a logic 0
selects a write operation.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9557, which will be stored
in the control register. This register can be written and read via the
I2C bus.
0
0
0
0
0
0
D1 D0
Register 1 – Output Port Register
bit O7 O6 O5 O4 O3 O2 O1 O0
default 0
0
0
0
0
0
0
0
This register reflects the outgoing logic levels of the pins defined as
outputs by the Configuration Register. Bit values in this register have
no effect on pins defined as inputs. In turn, reads from this register
reflect the value that is in the flip-flop controlling the output selection,
NOT the actual pin value.
Register 2 – Polarity Inversion Register
bit N7 N6 N5 N4 N3 N2 N1 N0
default 1
1
1
1
0
0
0
0
This register enables polarity inversion of pins defined as inputs by
the Configuration Register. If a bit in this register is set (written
with ‘1’), the corresponding port pin’s polarity is inverted. If a bit in
this register is cleared (written with a ‘0’), the corresponding port
pin’s original polarity is retained.
Register 3 – Configuration Register
bit C7 C6 C5 C4 C3 C2 C1 C0
default 1
1
1
1
1
1
1
1
This register configures the directions of the I/O pins. If a bit in this
register is set, the corresponding port pin is enabled as an input with
high impedance output driver. If a bit in this register is cleared, the
corresponding port pin is enabled as an output.
Figure 7. Control Register
SW00953
REGISTER DEFINITION
D1 D0
NAME
0
0 Register 0
0
1 Register 1
1
0 Register 2
1
1 Register 3
TYPE
FUNCTION
Read Input port register
Read/Write Output port register
Read/Write
Polarity inversion
register
Read/Write
Configuration
register
REGISTER DESCRIPTION
Register 0 – Input Port Register
I7
I6
I5
I4
I3
I2
I1
I0
This register is an read-only port. It reflects the incoming logic levels
of the pins, regardless of whether the pin is defined as an input or an
output by the Configuration Register. Writes to this register have no
effect.
POWER-ON RESET
When power is applied to VDD, an internal power-on reset holds the
PCA9557 in a reset state until VDD has reached VPOR. At that point,
the reset condition is released and the PCA9557 registers and
I2C/SMBus state machine will initialize to their default states.
For a power reset cycle, VDD must be set to 0 V, then ramped back
to the operating voltage.
RESET INPUT
A reset can be accomplished by holding the RESET pin LOW for a
minimum of tW. The PCA9557 registers and SMBus/I2C state
machine will be held in their default state until the RESET input is
once again HIGH. This input typically requires a pull-up to VCC.
2001 Dec 12
6
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