M66260FP 查看數據表（PDF） - MITSUBISHI ELECTRIC

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M66260FP

8 × 4 CROSSPOINT SWITCH with MIXING FUNCTION

MITSUBISHI ELECTRIC  

MITMSUITBSIUSBHIS〈HDIG〈DITIAGLITALSSAPS〉SP〉

M662M66062F6P0FP

8 × 48 C× R4OCSRSOPSOSINPOT ISNWT ISTWCHITwCiHthwMitIhXMINIGXINFUGNFCUTNIOCNTION

DESCRIPTION

The M66260 is an integrated circuit consisiting of a 8 × 4

cross point switch capable of selecting 32 analog switches

with mixing registance respectively by serial control inputs.

Using the M66260 with an external standard Op-Amp, 8 ana-

log input signals can be mixed and output to any of 4 outputs

freely by serial control inputs.

FEATURES

• Serial data input type

• Switching and mixing function possible with standard Op-

Amp.

• Switch matrix can be extended to 8 × 8 or 8 × 12 by com-

bining 2 or 3 ICs in parallel.

• Excellent crosstalk characteristic

.......................... –90 dB [f = 3 kHz, VIN = –10dBV] (typ.)

APPLICATION

Line switching with mixing function of telephone and commu-

nication equipments.

FUNCTION

Serial data input A is the data input of the first step of 32 BIT

SHIFT REGISTER and when latch enable input LE is “L”, the

signal of A shifts shifting registers one by one when shift

clock input CKs changes from “L” to “H”, in units of 32 bits.

PIN CONFIGURATION (TOP VIEW)

SHIFT CLOCK INPUT CKS → 1

SHIFT DATA INPUT

A→ 2

DIRECT-CONNECTED

RESET INPUT

SWITCH INPUT

RD → 3



X0

X2

X4

X6

→

→

→

→

4

5

6

7

SWITCH

OUTPUT YYOOYYUUSSTT0101

←

←

←

←

8

9

10

11

GND 12

24 VCC

23 →SQ31 SHIFT DATA OUTPUT

22 ←LE LATCH ENABLE INPUT

21

20

19

18

←←←←XXXX1357

SWITCH INPUT

17

16

15

14

→

→

→

→

YOUT3

YS3

YS2

YOUT2

SWITCH

OUTPUT

13 VCC

Outline 24P2N-B

The 32 bits are stored into LATCH CIRCUIT in parallel when

latch enable LE changes from “L” to “H”.

Analog switches come on in a low-impedance state when

the output of the corresponding latch circuit is “H”. They

come off in a high-impedance stage when the output of the

corresponding circuit is “L”.

BLOCK DIAGRAM

DIRECT

RESET INPUT

SHIFT CLOCK

INPUT

 YOUT0 8













YS0

9

 YOUT1 11















YS1

YOUT2

10

14









 YS2 15





YOUT3

17









 YS3 16

LATCH ENABLE SHIFT DATA

SWITCH INPUTS

INPUT

INPUT

X7

X6

X5

X4

X3

X2

X1

X0 RD LE CKS A

18

7

19

6

20

5

21

43

22 1

2

R LE CK DIN

7

6

5

4

3

2

1

0

QL0 DL0 QS0

QL1 DL1 QS1

QL2 DL2 QS2

QL3 DL3 QS3

QL4 DL4 QS4

15

14

13

12

11

10

9

8

23

22

21

20

19

18

17

16

LATCH

CIRCUIT

(× 32)

32-BIT

SHIFT

REGISTER

Note 1:

n

QLn

QL30 DL30 QS30

QL31 DL31 QS31

31

30

29

28

27

26

25

24

12 13

GND VCC

n = 0~31

24

23

VCC

SQ31

SHIFT DATA OUTPUT

1

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