74LV259D 查看數據表（PDF） - Philips Electronics
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74LV259D Datasheet PDF : 14 Pages
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Philips Semiconductors
8-bit addressable latch
PIN CONFIGURATION
A0 1
A1 2
A2 3
Q0 4
Q1 5
Q2 6
Q3 7
GND 8
16 VCC
15 MR
14 LE
13 D
12 Q7
11 Q6
10 Q5
9 Q4
SV01602
LOGIC SYMBOL
13
1
2
3
14
LE
Q0
4
D
Q1
5
Q2
6
Q3
7
A0
Q4
9
A1
Q5
10
A2
Q6
11
MR Q7
12
15
SV01601
FUNCTIONAL DIAGRAM
1 A0
2 A1
3 A2
1-of–8
DECODER
14 LE
15 MR
13 D
8 LATCHES
Q0 4
Q1 5
Q2 6
Q3 7
Q4 9
Q 5 10
Q 6 11
Q7 12
SV01604
Product specification
74LV259
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 2, 3
4, 5, 6, 7, 9,
10, 11, 12
A0 to A2
Q0 to Q7
Address inputs
Latch outputs
8
GND
Ground (0 V)
13
D
Data input
14
LE
Latch enable input (active LOW)
15
MR
Conditional reset input (active LOW)
16
VCC
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
15
G8
13
Z9
DX
9, 10D
0
1 C10 4
8R
1
0
5
2
3
1
G
0
7
6
14
2
2
7
3
9
4
10
5
11
6
12
7
SV01603
MODE SELECT TABLE
LE MR
MODE
L H Addressable latch
H H Memory
L L Active HIGH 8-channel demultiplexer
H L Reset
1998 May 20
3
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