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PIC16LC72-02I/SS 查看數據表(PDF) - Microchip Technology

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PIC16LC72-02I/SS
Microchip
Microchip Technology Microchip
PIC16LC72-02I/SS Datasheet PDF : 124 Pages
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PIC16C72 Series
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the operation of the PIC16C72 device. Additional infor-
mation may be found in the PICmicro™ Mid-Range
MCU Reference Manual (DS33023) which may be
downloaded from the Microchip website. The Refer-
ence Manual should be considered a complementary
document to this data sheet, and is highly recom-
mended reading for a better understanding of the
device architecture and operation of the peripheral
modules.
The PIC16C72 belongs to the Mid-Range family of the
PICmicro devices. A block diagram of the device is
shown in Figure 1-1.
The program memory contains 2K words which trans-
late to 2048 instructions, since each 14-bit program
memory word is the same width as each device instruc-
tion. The data memory (RAM) contains 128 bytes.
There are also 22 I/O pins that are user-configurable on
a pin-to-pin basis. Some pins are multiplexed with other
device functions. These functions include:
• External interrupt
• Change on PORTB interrupt
• Timer0 clock input
• Timer1 clock/oscillator
• Capture/Compare/PWM
• A/D converter
• SPI/I2C
Table 1-1 details the pinout of the device with descrip-
tions and details for each pin.
FIGURE 1-1: PIC16C72/CR72 BLOCK DIAGRAM
EPROM/
ROM
Program
Memory
2K x 14
Program
Bus
14
Instruction reg
13
Program Counter
Data Bus
8
8 Level Stack
(13-bit)
RAM
File
Registers
128 x 8
RAM Addr(1)
9
Addr MUX
Direct Addr 7
Indirect
8 Addr
FSR reg
STATUS reg
8
Instruction
Decode &
Control
OSC1/CLKIN
OSC2/CLKOUT
Timing
Generation
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
3
MUX
ALU
8
W reg
PORTA
PORTB
PORTC
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3/VREF
RA4/T0CKI
RA5/SS/AN4
RB0/INT
RB7:RB1
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6
RC7
Timer0
MCLR VDD, VSS
Timer1
Timer2
Synchronous
A/D
Serial Port
CCP1
Note 1: Higher order bits are from the STATUS register.
© 1998 Microchip Technology Inc.
Preliminary
DS39016A-page 3

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