MSM80C88A-10GS-K 查看數據表（PDF） - Oki Electric Industry

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MSM80C88A-10GS-K

8-Bit CMOS MICROPROCESSOR

Oki Electric Industry 

¡ Semiconductor

MSM80C88A-10RS/GS/JS

RQ/GT0

RQ/GT1

REQUEST/GRANT:Input/Output

These lines are used for Bus Request from other devices and Bus GRANT to other devices.

These lines are bidirectional and active low.

LOCK

LOCK:Output

This line is active low.

When this line is low, other devices cannot gain control of the bus.

This line is high impedance hold acknowledge.

QS0/QS1

QUEUE STATUS: Output

These are Queue Status Lines that indicate internal instruction queue status.

QS1 QS0

0 (LOW) 0

0

1

1 (HIGH) 0

1

1

Characteristics

No operation

First Byte of Op Code from Queue

Empty the Queue

Subsequent Byte from Queue

The following pin function descriptions are minimum mode only. Other pin functions are

already described.

IO/M

STATUS: Output

This line selects memory address space or I/O address space.

When this line is low, the CPU selects memory address space and when it is high, the CPU

selects I/O address space.

This line is high impedance during hold acknowledge.

WR

WRITE: Output

This line indicates that the CPU is in a memory or I/O write cycle.

This line is a write strobe signal when the CPU writes data to memory or an I/O device.

This line is active low. This line is high impedance during hold acknowledge.

INTA

INTERRUPT ACKNOWLEDGE: Output

This line is a read strobe signal for the interrupt acknowledge cycle.

This line is active low.

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