MSM80C88A-10GS-K 查看數據表（PDF） - Oki Electric Industry

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MSM80C88A-10GS-K

8-Bit CMOS MICROPROCESSOR

Oki Electric Industry 

¡ Semiconductor

MSM80C88A-10RS/GS/JS

ALE

ADDRESS LATCH ENABLE: Output

This line is used for latching an address into the MSM82C12 address latch it is a positive pulse

and the trailing edge is used to strobe the address. This line is never floated.

DT/R

DATA TRANSMIT/RECEIVE: Output

This line is used to control the direction of the bus transceiver.

When this line is high, the CPU transmits data, and when it is low. the CPU receives data.

This line is high impedance during hold acknowledge.

DEN

DATA ENABLE: Output

This line is used to control the output enable of the bus transceiver. This line is active low. This

line is high impedance during hold acknowledge.

HOLD

HOLD REQUEST: Input

This line is used for a Bus Request from an other device.

This line is active high.

HLDA

HOLD ACKNOWLEDGE: Output

This line is used for a Bus Grant to an other device.

This line is active high.

SS0

STATUS: Output

This line is logically equivalent to S0 in the maximum mode.

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