HYS64V16220GU 查看數據表（PDF） - Siemens AG

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HYS64V16220GU

3.3 V 8M × 64/72-Bit 1 Bank SDRAM Module, 3.3 V 16M × 64/72-Bit 2 Bank SDRAM Module

Siemens AG 

3.3 V 8M × 64/72-Bit 1 Bank SDRAM Module

3.3 V 16M × 64/72-Bit 2 Bank SDRAM Module

168 pin unbuffered DIMM Modules

HYS 64/72V8200GU

HYS 64/72V16220GU

• 168 Pin PC100-compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules

for PC main memory applications

• 1 bank 8M × 64, 8M × 72 and 2 bank 16M × 64, 16M × 72 organization

• Optimized for byte-write non-parity or ECC applications

• JEDEC standard Synchronous DRAMs (SDRAM)

• Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification

• SDRAM Performance

fCK Clock frequency (max.)

tAC Clock access time

• Programmed Latencies

-8

-8B -10 Units

100 100

66 MHz

6

6

8 ns

Product Speed CL

-8

PC100 2

-8B

PC100 3

-10

PC66 2

tRCD tRP

2

2

2

3

2

2

• Single + 3.3 V (± 0.3 V ) power supply

• Programmable CAS Latency, Burst Length and Wrap Sequence

(Sequential & Interleave)

• Auto Refresh (CBR) and Self Refresh

• Decoupling capacitors mounted on substrate

• All inputs, outputs are LVTTL compatible

• Serial Presence Detect with E2PROM

• Utilizes 8M × 8 SDRAMs in TSOPII-54 packages

• 4096 refresh cycles every 64 ms

• 133.35 mm × 31.75 mm × 4.00 mm card size with gold contact pads

Semiconductor Group

1

1998-08-01

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