PCA8565 查看數據表（PDF） - Philips Electronics

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PCA8565

Real time clock/calender

Philips Electronics 

Philips Semiconductors

PCA8565

Real time clock/calender

9.5.2 Clock/calendar read/write cycles

The I2C-bus configuration for the different PCA8565 read and write cycles is shown in

Figure 11, Figure 12 and Figure 13. The word address is a 4-bit value that defines

which register is to be accessed next. The upper four bits of the word address are not

used.

acknowledgement

from slave

acknowledgement

from slave

acknowledgement

from slave

S SLAVE ADDRESS 0 A WORD ADDRESS A

DATA

AP

R/W

Fig 11. Master transmits to slave receiver (write mode).

n bytes

auto increment

memory word address

MBD822

acknowledgement

from slave

acknowledgement

from slave

acknowledgement

from slave

acknowledgement

from master

S SLAVE ADDRESS 0 A WORD ADDRESS A S SLAVE ADDRESS 1 A

R/W

R/W

at this moment master transmitter

becomes master receiver and

PCA8565 slave receiver

becomes slave transmitter

DATA

A

n bytes

auto increment

memory word address

no acknowledgement

from master

MCE172

Fig 12. Master reads after setting word address (write word address; read data).

DATA

1P

last byte

auto increment

memory word address

handbook, full pagewidth

acknowledgement

from slave

acknowledgement

from master

no acknowledgement

from master

S SLAVE ADDRESS 1 A

DATA

A

DATA

1P

R/W

n bytes

auto increment

word address

last byte

auto increment

word address

MGL665

Fig 13. Master reads slave immediately after first byte (read mode).

9397 750 10695

Product data

Rev. 01 — 31 March 2003

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

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