PCA8537 查看數據表（PDF） - NXP Semiconductors.
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PCA8537 Datasheet PDF : 82 Pages
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NXP Semiconductors
PCA8537
Automotive LCD driver for multiplex rates up to 1:8
Table 6. Initialize - initialize command bit description
For further information, see Section 8.2 on page 16.
Bit
Symbol
Binary value Description
7 to 0 -
00111010
fixed value
8.1.2 Command: OTP-refresh
During production and testing of the device, each IC is calibrated to achieve the specified
accuracy of VLCD, the frame frequency, and the temperature measurement. This
calibration is performed on EPROM cells called One Time Programmable (OTP) cells.
The device reads these cells every time at power-on, after a reset, and every time when
the initialize command or the OTP-refresh command is sent.
Remark: It is recommended not to enter power-down mode during the OTP refresh cycle.
Table 7. OTP-refresh - OTP-refresh command bit description
Bit
Symbol
Binary value Description
7 to 0 -
1101 0000
fixed value
8.1.3 Command: Oscillator-ctrl
The Oscillator-ctrl command switches between internal and external oscillator and
enables or disables the pin CLK.
Table 8. Oscillator-ctrl - oscillator control command bit description
For further information, see Section 8.1.3.1.
Bit
Symbol
Binary value Description
7 to 2 -
1100 11
fixed value
1
COE
control pin CLK
0[1]
clock signal not available on pin CLK;
pin CLK is in 3-state and may be left floating
1
clock signal available on pin CLK
0
OSC
oscillator source
0[1]
internal oscillator used
1
external oscillator used;
pin CLK becomes an input
[1] Default value.
8.1.3.1 Oscillator
The internal logic and LCD drive signals of the PCA8537 are timed either by the built-in
oscillator or from an external clock.
8.1.3.2 Internal oscillator
When the internal oscillator is used, it is possible to make the clock signal available on pin
CLK by using the Oscillator-ctrl command (see Table 8). If this is not intended, the pin
CLK should be left open. At power-on the signal at pin CLK is disabled and pin CLK is in
3-state.
PCA8537
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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