D8752BH 查看數據表（PDF） - Intel
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D8752BH Datasheet PDF : 21 Pages
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MCS@51 CONTROLLER
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has 5 characters. The first char-
acter is always a ‘T’ (stands for time). The other
characters, depending on their positions, stand for
the name of a signal or the logical status of that
signal. The following is a list of all the characters and
what they stand for.
A: Address
C: Clock
D: Input Data
H: Logic level HIGH
1:Instruction (program memory contents)
L: ~level LOW, or ALE
P: PSEN
Q: Output data
R: ~ signal
T: Time
V: Valid
W: WR signal
X: No longer a valid logic level
Z: Float
For example,
TAVLL = Time from Address Valid to ALE Low.
TLLPL = Time from ALE Low to PSEN Low.
AC CHARACTERISTICS (Under Operating Conditions; Load Capacitance for Port O,ALE/PROG, and
PSEN = 100 pF; Load Capacitance for All Other Outputs = 80 pF)
EXTERNAL PROGRAM MEMORY CHARACTERISTICS
Symbol
Parameter
1/TCLCL
TLHLL
TAVLL
TLLAX
TLLIV
Oscillator Frequency
ALE Pulse Width
Address Valid to ALE Low
Address Hold after ALE Low
ALE Low to Valid Instr In
8751 H
All Others
12 MHz Oscillator
Min
Max
127
43
48
183
233
Variable Oscillator
Min
Max
3.5
12.0
2TCLCL–40
TCLCL–40
TCLCL–35
Units
MHz
ns
ns
ns
4TCLCL– 150 ns
4TCLCL– 100 ns
TLLPL
ALE LOW to PSEN LOW
58
TCLCL–25
ns
TPLPH PSEN Pulse Width
8751 H
190
3TCLCL–60
ns
All Others
215
3TCLCL–35
ns
TPLIV
PSEN Low to Valid Instr In
8751H
All Others
TPXIX
Input Instr Hold after PSEN
o
TPXIZ
Input Instr Float after PSEN
TPXAV PSEN to Address Valid
75
100
3TCLCL– 150 ns
125
3TCLCL– 125 ns
0
ns
63
TCLCL–20
ns
TCLCL–8
ns
TAVIV
Address to Valid Instr In
8751 H
287
5TCLCL–1 50 ns
All Others
302
5TCLCL–1 15 ns
TPLAZ PSEN Low to Address Float
20
20
ns
TRLRH ~ Pulse Width
400
6TCLCL– 100
ns
TWLWH WR Pulse Width
400
6TCLCL– 100
ns
TRLDV ~ Low to Valid Data In
252
5TCLCL– 165 ns
TRHDX Data Hold after ~
o
0
ns
TRHDZ Data Float after ~
97
2TCLCL–70
ns
TLLDV ALE Low to Valid Data In
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