PCA9530DP 查看數據表（PDF） - NXP Semiconductors.

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PCA9530DP

2-bit I2C-bus LED dimmer

NXP Semiconductors. 

NXP Semiconductors

PCA9530

2-bit I2C-bus LED dimmer

The last bit of the address byte defines the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

6.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the PCA9530, which will be stored in the Control register.

0 0 0 AI 0 B2 B1 B0

Auto-Increment flag

Reset state: 00h

Fig 5. Control register

register address

002aae500

The lowest 3 bits are used as a pointer to determine which register will be accessed.

If the Auto-Increment flag is set, the three low order bits of the Control register are

automatically incremented after a read or write. This allows the user to program the

registers sequentially. The contents of these bits will rollover to ‘000’ after the last register

is accessed.

When Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the sequence

must start by reading a register different from the Input register (B2 B1 B0 ≠ 0 0 0).

Only the 3 least significant bits are affected by the AI flag. Unused bits must be

programmed with zeroes.

6.2.1 Control register definition

Table 3. Register summary

B2 B1 B0 Symbol

0

0

0

INPUT

0

0

1

PSC0

0

1

0

PWM0

0

1

1

PSC1

1

0

0

PWM1

1

0

1

LS0

Access

read only

read/write

read/write

read/write

read/write

read/write

Description

input register

frequency prescaler 0

PWM register 0

frequency prescaler 1

PWM register 1

LED selector

PCA9530_3

Product data sheet

Rev. 03 — 26 February 2009

© NXP B.V. 2009. All rights reserved.

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