PCA9536 查看數據表（PDF） - NXP Semiconductors.

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PCA9536

4-bit I2C-bus and SMBus I/O port

NXP Semiconductors. 

NXP Semiconductors

PCA9536

4-bit I2C-bus and SMBus I/O port

SCL 1 2 3 4 5 6 7 8 9

slave address

data from port

data from port

SDA S 1 0 0 0 0 0 1 1 A

DATA 1

A

DATA 4

NA P

START condition

read from

port

data into

port

R/W

acknowledge

from slave

acknowledge

from master

th(D)

DATA 2

tsu(D)

DATA 3

no acknowledge STOP

from master condition

DATA 4

002aab857

This figure assumes the command byte has previously been programmed with 00h.

Transfer of data can be stopped at any moment by a STOP condition.

Fig 10. Read Input Port register

7. Application design-in information

VDD

VDD

SDA

SCL

MASTER

CONTROLLER

VSS

10 kΩ

10 kΩ

VDD

SDA

IO0

SCL

IO1

PCA9536

IO2

IO3

2 kΩ

SUBSYSTEM 1

(e.g. temp. sensor)

INT

RESET

SUBSYSTEM 2

(e.g. counter)

VSS

A

enable

controlled switch

(e.g. CBT device)

B

002aab858

Device address is 1000 001X; IO0, IO2, IO3 configured as outputs; IO1 configured as input.

Fig 11. Typical application

PCA9536

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6 — 7 November 2017

© NXP Semiconductors N.V. 2017. All rights reserved.

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