PCA9536 查看數據表（PDF） - NXP Semiconductors.
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PCA9536 Datasheet PDF : 24 Pages
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NXP Semiconductors
PCA9536
4-bit I2C-bus and SMBus I/O port
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S 1 0 0 0 0 0 1 0 A 0 0 0 0 0 0 0 1 A
START condition
write to port
R/W
acknowledge
from slave
acknowledge
from slave
data out
from port
Fig 7. Write to Output Port register
data to port
DATA 1
AP
acknowledge STOP
from slave condition
tv(Q)
data 1 valid
002aab854
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S 1 0 0 0 0 0 1 0 A 0 0 0 0 0 0 0 1/0 A
START condition
data to
register
R/W
acknowledge
from slave
acknowledge
from slave
Fig 8. Write to Configuration register or Polarity Inversion register
data to register
DATA
AP
acknowledge STOP
from slave condition
002aab855
slave address
SDA S 1 0 0 0 0 0 1 0 A
command byte
A (cont.)
START condition
R/W
acknowledge
from slave
slave address
(cont.) S 1 0 0 0 0 0 1 1 A
acknowledge
from slave
data from register
DATA (first byte)
A
data from register
DATA (last byte)
NA P
(repeated)
START condition
R/W
acknowledge
from slave
Fig 9. Read from register
acknowledge
from master
no acknowledge STOP
from master condition
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
002aab856
PCA9536
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 7 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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