PCA9538APWJ 查看數據表（PDF） - NXP Semiconductors.
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PCA9538APWJ Datasheet PDF : 37 Pages
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NXP Semiconductors
PCA9538A
Low-voltage 8-bit I2C-bus I/O port with interrupt and reset
7.2 Read commands
To read data from the PCA9538A, the bus master must first send the PCA9538A address
with the least significant bit set to a logic 0 (see Figure 4 for device address). The
command byte is sent after the address and determines which register is to be accessed.
After a restart the device address is sent again, but this time the LSB is set to a logic 1.
Data from the register defined by the command byte then is sent by the PCA9538A (see
Figure 9 and Figure 10).
Data is clocked into the register on the rising edge of the ACK clock pulse. There is no
limit on the number of data bytes received in one read transmission, but on the final byte
received the bus master must not acknowledge the data.
slave address
SDA S 1 1 1 0 0 A1 A0 0 A
COMMAND BYTE
A (cont.)
START condition
R/W
acknowledge
from slave
slave address
(cont.) S 1 1 1 0 0 A1 A0 1 A
acknowledge
from slave
data from register
DATA (first byte)
A
data from register
DATA (last byte)
NA P
(repeated)
START condition
R/W
acknowledge
from slave
Fig 9. Read from register
acknowledge
from master
no acknowledge STOP
from master condition
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
002aah104
SCL 1 2 3 4 5 6 7 8 9
slave address
data from port
data from port
no acknowledge
from master
SDA S 1 1 1 0 0 A1 A0 1 A
DATA 1
A
DATA 4
1P
START condition
read from
port
R/W acknowledge from slave
acknowledge from master
STOP
condition
data into
port
INT
DATA 1
th(D)
DATA 2
DATA 3
tsu(D)
tv(INT)
trst(INT)
DATA 4
DATA 5
INT is cleared by
read from port
STOP not needed
to clear INT
002aah105
Transfer of data can be stopped at any time by a STOP condition. When this occurs, data present at the latest acknowledge
phase is valid (output mode). It is assumed that the command byte has previously been programmed with 00h (read Input port
register).
This figure eliminates the command byte transfer, a restart, and slave address call between the initial slave address call and
actual data transfer from P port (see Figure 9).
Fig 10. Read Input port register
PCA9538A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 28 September 2012
© NXP B.V. 2012. All rights reserved.
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