PCA9538PW 查看數據表（PDF） - NXP Semiconductors.
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PCA9538PW Datasheet PDF : 28 Pages
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NXP Semiconductors
PCA9538
8-bit I2C-bus and SMBus low power I/O port with interrupt and reset
6. Functional description
Refer to Figure 1 “Block diagram of PCA9538”.
6.1 Device address
Fig 5. PCA9538 address
slave address
1 1 1 0 0 A1 A0 R/W
fixed
hardware
selectable
002aae707
6.2 Registers
6.2.1 Command byte
The command byte is the first byte to follow the address byte during a write transmission.
It is used as a pointer to determine which of the registers will be written or read.
Table 3. Command byte
Command Protocol
0
read byte
1
read/write byte
2
read/write byte
3
read/write byte
Function
Input Port register
Output Port register
Polarity Inversion register
Configuration register
6.2.2 Register 0 - Input Port register
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless
of whether the pin is defined as an input or an output by Register 3. Writes to this register
have no effect.
The default value ‘X’ is determined by the externally applied logic level.
Table 4. Register 0 - Input Port register bit description
Legend: * default value.
Bit Symbol Access Value
Description
7
I7
6
I6
read only X*
read only X*
value ‘X’ is determined by externally applied
logic level
5
I5
read only X*
4
I4
read only X*
3
I3
read only X*
2
I2
read only X*
1
I1
read only X*
0
I0
read only X*
PCA9538_5
Product data sheet
Rev. 05 — 28 May 2009
© NXP B.V. 2009. All rights reserved.
5 of 28
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