PCA9538 查看數據表（PDF） - NXP Semiconductors.
零件编号
产品描述 (功能)
生产厂家
PCA9538 Datasheet PDF : 28 Pages
| |||
NXP Semiconductors
PCA9538
8-bit I2C-bus and SMBus low power I/O port with interrupt and reset
6.6 I/O port
When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a
high-impedance input. The input voltage may be raised above VDD to a maximum of 5.5 V.
If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the
state of the Output Port register. Care should be exercised if an external voltage is applied
to an I/O configured as an output because of the low-impedance paths that exist between
the pin and either VDD or VSS.
data from
shift register
data from
shift register
write
configuration
pulse
configuration
register
DQ
FF
CK Q
write pulse
read pulse
data from
shift register
write polarity
pulse
DQ
FF
CK
output port
register
Q1
Q2
input port
register
DQ
FF
CK
polarity inversion
register
DQ
FF
CK
Remark: At power-on reset, all registers return to default values.
Fig 6. Simplified schematic of IO0 to IO7
output port
register data
VDD
I/O pin
VSS
input port
register data
to INT
polarity
inversion
register data
002aad723
PCA9538_5
Product data sheet
Rev. 05 — 28 May 2009
© NXP B.V. 2009. All rights reserved.
8 of 28
Share Link: 