PCA9554C 查看數據表（PDF） - NXP Semiconductors.
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PCA9554C
NXP Semiconductors.
PCA9554C Datasheet PDF : 36 Pages
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NXP Semiconductors
5. Pinning information
5.1 Pinning
PCA9554B; PCA9554C
Low-voltage 8-bit I2C-bus/SMBus low power I/O port
terminal 1
index area
A0 1
A1 2
A2 3
P0 4
P1 5
P2 6
P3 7
VSS 8
PCA9554BPW
PCA9554CPW
16 VDD
15 SDA
14 SCL
13 INT
12 P7
11 P6
10 P5
9 P4
002aah119
Fig 2. Pin configuration for TSSOP16
A2 1
P0 2
P1 3
P2 4
PCA9554BBS
PCA9554CBS
12 SCL
11 INT
10 P7
9 P6
Transparent top view
002aah120
Fig 3. Pin configuration for HVQFN16
5.2 Pin description
Table 3.
Symbol
A0
A1
A2
P0[1]
P1[1]
P2[1]
P3[1]
VSS
P4[1]
P5[1]
P6[1]
P7[1]
INT
SCL
SDA
VDD
Pin description
Pin
TSSOP16
HVQFN16
1
15
2
16
3
1
4
2
5
3
6
4
7
5
8
6[2]
9
7
10
8
11
9
12
10
13
11
14
12
15
13
16
14
Description
address input 0
address input 1
address input 2
Port P input/output 0
Port P input/output 1
Port P input/output 2
Port P input/output 3
supply ground
Port P input/output 4
Port P input/output 5
Port P input/output 6
Port P input/output 7
interrupt output (open-drain)
serial clock line
serial data line
supply voltage
[1] All I/O are configured as input at power-on.
[2] HVQFN16 package die supply ground is connected to both the VSS pin and the exposed center pad. The
VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
PCA9554B_PCA9554C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 September 2012
© NXP B.V. 2012. All rights reserved.
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