PCA9554AN 查看數據表（PDF） - NXP Semiconductors.

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PCA9554AN

8-bit I²C-bus and SMBus I/O port with interrupt

NXP Semiconductors. 

NXP Semiconductors

PCA9554/PCA9554A

8-bit I2C-bus and SMBus I/O port with interrupt

slave address

SDA S 0 1 0 0 A2 A1 A0 0 A

command byte

A (cont.)

START condition

R/W

acknowledge

from slave

slave address

(cont.) S 0 1 0 0 A2 A1 A0 1 A

acknowledge

from slave

data from register

DATA (first byte)

A

data from register

DATA (last byte)

NA P

(repeated)

START condition

Fig 14. Read from register

R/W

acknowledge

from slave

acknowledge

from master

no acknowledge STOP

from master condition

at this moment master-transmitter becomes master-receiver

and slave-receiver becomes slave-transmitter

002aac474

SCL 1 2 3 4 5 6 7 8 9

slave address

data from port

data from port

SDA S 0 1 0 0 A2 A1 A0 1 A

DATA 1

A

DATA 4

NA P

START condition

read from

port

data into

port

INT

tv(INT_N)

R/W

acknowledge

from slave

acknowledge

from master

th(D)

DATA 2 DATA 3

trst(INT_N)

tsu(D)

no acknowledge STOP

from master condition

DATA 4

002aac475

This figure assumes the command byte has previously been programmed with 00h.

Transfer of data can be stopped at any moment by a STOP condition.

Fig 15. Read Input Port register

PCA9554_9554A_7

Product data sheet

Rev. 07 — 13 November 2006

© NXP B.V. 2006. All rights reserved.

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