PCA9558 查看數據表（PDF） - Philips Electronics

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PCA9558

8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM

Philips Electronics 

Philips Semiconductors

8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit

latched 6-bit I2C EEPROM and 2 k bit EEPROM

Product data

PCA9558

EEPROM write operation

6-bit write operation

A write operation to the 6-bit EEPROM requires that an address

byte be written after the command byte. This address points to the

6-bit address space in the EEPROM array. Upon receipt of this

address, the PCA9558 waits for the next byte that will be written to

the EEPROM. The master then ends the transaction with a STOP

condition on the I2C. See Figure 10.

After the STOP condition, the E/W cycle starts, and the parts will not

respond to any request to access the EEPROM array until the cycle

finishes, approximately 4 ms.

6-bit read operation

A read operation is initiated in the same manner as a write

operation, with the exception that after the word address has been

written a REPEATED START condition is placed on the I2C-bus and

the direction of communication is reversed (see Figure 11).

256 byte write operation (I2C)

A write operation to the 256 byte EEPROM requires that an address

byte be written after the command byte. This address points to the

starting address in the EEPROM array. The four LSBs of this

address select a position on a 16 byte page register, the 4 MSBs

select which page register. The four LSBs will be auto-incremented

after receipt of each byte of data; in this manner, the entire page

register can be written starting at any point. Up to 16 bytes of data

may be sent to the PCA9558, followed by a STOP condition on the

I2C-bus. If the master sends more than 16 bytes of data prior to

generating a STOP condition, data within the address page will be

overwritten and unpredictable results may occur. See Figure 12.

After the STOP condition, the E/W cycle starts, and the parts will not

respond to any request to access the EEPROM array until the cycle

finishes, approximately 4 ms.

256 byte read operation (I2C)

A read operation is initiated in the same manner as a write

operation, with the exception that after the word address has been

written, a REPEATED START condition is placed on the I2C-bus,

and the direction of communication is reversed. For a read

operation, the entire address is incremented after the transmission

of each byte, meaning that the entire 256 byte EEPROM array can

be read at one time. See Figure 13.

256 byte EEPROM write to GPIO

A mode is available whereby a byte of data in the 256 byte

EEPROM array can be written to the GPIO (OPR). This is initiated

by the I2C-bus. In this mode, a control word indicating a read from

the 256 byte EEPROM and write to the GPIO is sent, followed by

the word address of the data within the EEPROM array. Upon

ACKNOWLEDGE from the slave, the data is sent to the GPIO. See

Figure 14.

256 byte EEPROM write from GPIO

A mode is available whereby data in the GPIO (IPR) can be written

to the 256 byte EEPROM. This is initiated by the I2C-bus. In this

mode, a control word indicating a read from the GPIO and write to

the 256 byte EEPROM is sent, followed by the word address for the

data to be written. Once the slave sent an ACKNOWLEDGE, the

master must send a STOP condition. See Figure 15.

After the STOP condition, the E/W cycle starts, and the parts will not

respond to any request to access the EEPROM array until the cycle

finishes, approximately 4 ms.

When the Write Protect (WP) input is a logic 0 it allows writes to

both EEPROM arrays. When a logic 1, it prevents any writes to the

EEPROM arrays.

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

S 1 0 0 1 1 1 A0 0 A 0 0 0 0 0 1 0 0 A 1 1 1 1 1 1 1 1 A X X d5 d4 d3 d2 d1 d0 A P

SLAVE ADDRESS

R/W

COMMAND BYTE

EEPROM ADDRESS

Figure 10. I2C write of 6-bit EEPROM

DATA FOR 6bitEEPROM

PROGRAMMING BEGINS AFTER STOP

SW00640

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

ACKNOWLEDGE

FROM SLAVE

NO ACKNOWLEDGE

FROM MASTER

S 1 0 0 1 1 1 A0 0 A 0 0 0 0 0 1 1 0 A 1 1 1 1 1 1 1 1 A S 1 0 0 1 1 1 A0 1 A 0 0 d5 d4 d3 d2 d1 d0 NA P

SLAVE ADDRESS

R/W

COMMAND BYTE

EEPROM ADDRESS

SLAVE ADDRESS

R/W

Figure 11. I2C read of 6-bit EEPROM

DATA FROM 6bitEEPROM

SW00641

2002 May 24

9

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