PCA9555 查看數據表（PDF） - NXP Semiconductors.

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PCA9555

16-bit I2C-bus and SMBus I/O port with interrupt

NXP Semiconductors. 

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data into port 0

data into port 1

DATA 00

th(D)

DATA 10

DATA 01

INT

tv(INT_N)

trst(INT_N)

SCL 1 2 3 4 5 6 7 8 9

R/W

slave address

I0.x

SDA S 0 1 0 0 A2 A1 A0 1 A

DATA 00

A

START condition

read from port 0

acknowledge

from slave

acknowledge

from master

read from port 1

DATA 02

tsu(D)

DATA 11

th(D)

I1.x

DATA 10

A

acknowledge

from master

DATA 03

tsu(D)

I0.x

DATA 03

A

acknowledge

from master

DATA 12

STOP condition

I1.x

DATA 12

1P

non acknowledge

from master

002aac224

Remark: Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid (output mode). It

is assumed that the command byte has previously been set to ‘00’ (read Input Port register).

Fig 14. Read Input port register, scenario 2

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