PCA9555 查看數據表（PDF） - NXP Semiconductors.

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PCA9555

16-bit I2C-bus and SMBus I/O port with interrupt

NXP Semiconductors. 

NXP Semiconductors

PCA9555

16-bit I2C-bus and SMBus I/O port with interrupt

11. Dynamic characteristics

Table 15. Dynamic characteristics

Symbol Parameter

Conditions

fSCL

SCL clock frequency

tBUF

bus free time between a STOP and

START condition

tHD;STA

tSU;STA

hold time (repeated) START condition

set-up time for a repeated START

condition

tSU;STO

tVD;ACK

tHD;DAT

tVD;DAT

tSU;DAT

tLOW

tHIGH

tf

tr

tSP

set-up time for STOP condition

data valid acknowledge time

data hold time

data valid time

data set-up time

LOW period of the SCL clock

HIGH period of the SCL clock

fall time of both SDA and SCL signals

rise time of both SDA and SCL signals

pulse width of spikes that must be

suppressed by the input filter

Port timing

tv(Q)

data output valid time

tsu(D)

data input set-up time

th(D)

data input hold time

Interrupt timing

tv(INT_N) valid time on pin INT

trst(INT_N) reset time on pin INT

Standard-mode

I2C-bus

Min

Max

0

100

4.7

-

Fast-mode I2C-bus

Min

Max

0

400

1.3

-

4.0

-

0.6

-

4.7

-

0.6

-

4.0

[1] 0.3

0

[2] 300

250

4.7

4.0

-

-

-

-

0.6

-

3.45

0.1

0.9

-

0

-

-

50

-

-

100

-

-

1.3

-

-

0.6

-

300 20 + 0.1Cb[3] 300

1000 20 + 0.1Cb[3] 300

50

-

50

-

200

-

200

150

-

150

-

1

-

1

-

-

4

-

4

-

4

-

4

Unit

kHz

µs

µs

µs

µs

µs

ns

ns

ns

µs

µs

ns

ns

ns

ns

ns

µs

µs

µs

[1] tVD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW.

[2] tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.

[3] Cb = total capacitance of one bus line in pF.

PCA9555_8

Product data sheet

Rev. 08 — 22 October 2009

© NXP B.V. 2009. All rights reserved.

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