PC85133-1(2009) 查看數據表（PDF） - NXP Semiconductors.
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PC85133-1 Datasheet PDF : 41 Pages
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drive mode
LCD segments
LCD backplanes
static
Sn+2
Sn+3
Sn+4
Sn+5
Sn+6
a
b
f
g
e
c
d
Sn+1 BP0
Sn
Sn+7
DP
display RAM filling order
display RAM addresses (columns)/segment outputs (S)
byte1
n n+1 n+2 n+3 n+4 n+5 n+6 n+7
display RAM 0 c b
a
f
g
e
d
DP
bits (rows)/ 1 x x
x
x
x
x
x
x
backplane 2 x x
x
x
x
x
x
x
outputs (BP) 3 x
x
x
x
x
x
x
x
transmitted display byte
MSB
LSB
c b a f g e d DP
1:2
multiplex
Sn
a
b
Sn+1 f
g
Sn+2 e
c
Sn+3
d
BP0
DP
display RAM addresses (columns)/segment outputs (S)
byte1
byte2
n n+1 n+2 n+3
display RAM 0 a f
bits (rows)/ 1 b g
BP1 backplane 2 x
x
outputs (BP) 3 x
x
e
d
c
DP
x
x
x
x
MSB
LSB
a b f g e c d DP
1:3
multiplex
Sn+1
a
Sn+2 f
b Sn
BP0
g
e
c
d
BP1
DP
display RAM addresses (columns)/segment outputs (S)
byte1
byte2
byte3
n n+1 n+2
display RAM 0 b a
f
bits (rows)/ 1 DP d
e
BP2 backplane 2 c g
x
outputs (BP) 3 x
x
x
MSB
LSB
b DP c a d g f e
1:4
multiplex
Sn
a
b
f
g
e
c
Sn+1
d
BP0
BP1
DP
display RAM addresses (columns)/segment outputs (S)
byte1
byte2
byte3
byte4
byte5
BP2
n n+1
display RAM 0 a f
bits (rows)/ 1 c e
BP3
backplane
outputs (BP)
2b
3 DP
g
d
MSB
LSB
a c b DP f e g d
x = data bit unchanged
Fig 10. Relationships between LCD layout, drive mode, display RAM filling order and display data transmitted over the I2C-bus
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