PCF8593 查看數據表（PDF） - NXP Semiconductors.
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PCF8593 Datasheet PDF : 35 Pages
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NXP Semiconductors
PCF8593
Low power clock and calendar
In the event-counter mode, events are stored in BCD format. D5 is the most significant
and D0 the least significant digit. The divider is by-passed.
In the different modes the counter registers are programmed and arranged as shown in
Figure 8. Counter cycles are listed in Table 4.
control/status
hundredth of a second
1/10 s
1/100 s
seconds
10 s
1s
10 min
minutes
1 min
hours
10 h
1h
year/date
10 day
1 day
weekdays/months
10 month
timer
1 month
10 day
1 day
alarm control
hundredth of a second alarm
1/10 s
1/100 s
alarm seconds
alarm minutes
alarm hours
alarm date
alarm month
alarm timer
control/status
00h
D1
D0
01h
D3
D2
02h
D5
D4
03h
free
04h
free
05h
free
06h
timer
T1
T0
07h
alarm control
08h
alarm
D1
alarm
D0
09h
D3
D2
0Ah
D5
D4
0Bh
0Ch
free
free
0Dh
free
0Eh
alarm timer
0Fh
CLOCK MODES
Fig 8. Register arrangement
EVENT COUNTER
013aaa386
PCF8593
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 6 October 2010
© NXP B.V. 2010. All rights reserved.
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