PE42451-EK(2014) 查看數據表（PDF） - Peregrine Semiconductor Corp.
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PE42451-EK
(Rev.:2014)
(Rev.:2014)
Peregrine Semiconductor Corp.
PE42451-EK Datasheet PDF : 11 Pages
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PE42451
Product Specification
Figure 3. Pin Configuration (Top View)
GND 1
RF5 2
GND 3
GND 4
RF4 5
GND 6
Exposed
Ground
Paddle
18 V2
17 V1
16 Vdd
15 GND
14 RF1
13 GND
Table 3. Pin Descriptions
Pin #
Name
Description
1, 3, 4, 6, 7, 9, 10,
12, 13, 15, 21, 23, 24
2
GND
RF54
Ground
RF I/O
5
RF44 RF I/O
8
RF34 RF I/O
11
RF24 RF I/O
14
RF14 RF I/O
16
VDD Supply
17
V1 Switch control input, CMOS logic level
18
V2 Switch control input, CMOS logic level
19
V3 Switch control input, CMOS logic level
20
VssEXT /
GND5
External Vss Control / Ground
22
RFC4 RF Common
Paddle
GND Ground for proper device operation
Note:
4. Blocking capacitors needed only when non-zero DC
voltage present.
5. Pin 20 must be grounded when using internal Vss supply
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions
TST
PMAX
Storage temperature range
Maximum Operating Power
(RFX-RFC, All Bands (50Ω),
100% duty cycle)
PMAX
VESD
VESD
Maximum power into
termination (RFX, All Bands
(50Ω),100% duty cycle)
ESD Voltage HBM6, All Pins
ESD Voltage MM7, All Pins
Min
-60
Max Units
+150
°C
33
dBm
24
3500
150
dBm
V
V
Notes:
6. Human Body Model ESD Voltage (HBM, MIL_STD 883
Method 3015.7)
7. Machine Model ESD Voltage (JESD22-A115-A)
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table.
Document No. DOC-22914-2 │ www.psemi.com
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS® device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS®
devices are immune to latch-up.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE42451 in
the 24-lead 4x4 QFN package is MSL1.
Optional External Vss Control (VssEXT)
For proper operation, the VssEXT control must be
grounded or at the Vss voltage specified in the
Operating Ranges table (Table 2). When the VssEXT
control pin on the package is grounded the switch
FET’s are biased with an internal low spur negative
voltage generator. For applications that require the
lowest possible spur performance, VssEXT can be
applied to bypass the internal negative voltage
generator to eliminate the spurs.
Switching Frequency
The PE42451 has a maximum 25 kHz switching rate
when the internal negative voltage generator is used
(pin 20=GND). The rate at which the PE42451 can be
switched is only limited to the switching time if an
external -3 V supply is provided (pin 20=VssEXT ).
Table 5. Truth Table
Mode
V3
V2
V1
All off
0
0
0
RF1 on
0
0
1
RF2 on
0
1
0
RF3 on
0
1
1
RF4 on
1
0
0
RF5 on
1
0
1
All off
1
1
0
Unsupported
1
1
1
©2009-2014 Peregrine Semiconductor Corp. All rights reserved.
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