PG12864LRU-ORA-H-S0 查看數據表（PDF） - Powertip Technology

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PG12864LRU-ORA-H-S0

LCD Module

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NO.PG12864LRU-ORA-H Rev:0

(iii) SWAP Command (For the Graphic Display only)

When data to the Graphic Display RAM are written, the write data are swapped.

SWAP=”1”: Normal mode. In data-writing, the data of D7~D0 can be written to the Graphic

Display RAM.

SWAP=”1”: SWAP mode ON. In data-writing, the swapped data of D7~D0 can be written to the

Graphic Display RAM.

SWAP=”0”

SWAP=”1”

EXTERNAL DATA D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

INTERNAL DATA d7 d6 d5 d4 d3 d2 d1 d0 d0 d1 d2 d3 d4 d5 d6 d7

(iii) NLIN Command (For the Graphic Display only)

The ON/OFF control of n-line alternated drive is performed.

NLIN=”0” : n line alternated drive OFF. By using frame cycle, the alternated signals (M)

are reversed.

NLIN=”1” : n line alternated drive ON. According to data set up in n line alternated register, the

alternation is made.

(iv) REV Command (For the Graphic Display only)

Corresponding to the data of the Graphic Display RAM, the lighting or not-lighting of the display is set

up.

REV=”0”: When RAM data at “H”, LCD at ON voltage (normal)

REV=”1”: When RAM data at “L”, LCD at ON voltage (reverse)

2-4.10 Increment Control Register Set

RE RS D7 D6 D5 D4 D3

0

1

1

0

1

0

※

D2

D1

D0

AIM AY1 AX1

※ mark shows “Don’t care”(At the time of reset: (AIM, AY1, AX1)= 0H, read address :AH)

The increment mode is set up when accessing to the Graphic Display RAM. (The Graphic Display

RAM only)

By AIM, AY1 and AX1 registers, the setting-up of increment operation /non-operation for the

X-address counter and the Y-address counter every write access of every read access to the Graphic

Display RAM is possible.

In setting to this control register, the increment operation of address can be made without setting

successive addresses for writing data or for reading data to the Graphic Display RAM from MPU.

After setting this register be sure to set the X and Y Address Register.

Because it is not assuring the data of X and Y Address Register after setting increment Control Register.

The increment control of X and Y address by AIM, AY1 and AX1 registers is as follows.

ALM

SELECTION OF INCREMENT TIMING

REFERENCE

0 When writing to Graphic Display RAM or reading from Graphic Display RAM

<1>

1 Only when writing to Graphic Display RAM (read modify)

<2>

<1> This is effective when subsequently writing and reading the successive address area.

<2> This is effective in the case that after reading and writing the successive address area every address,

the read data are modified to write.

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