PM3386-BI 查看數據表（PDF） - PMC-Sierra

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PM3386-BI

DUAL GIGABIT ETHERNET CONTROLLER

PMC-Sierra 

RELEASED

DATASHEET

PMC-1991129

ISSUE 7

PM3386

DUAL GIGABIT ETHERNET CONTROLLER

Signal Name

TMOD[0]

TMOD[1]

TSX

Direction

Input

Input

Pin No.

AD6

AC7

AE7

Function

POS-PHY Transmit Word Modulo

TMOD[1:0] indicates the number of valid

bytes of data in TDAT[31:0]. The TMOD

bus should always be all zero, except

during the last double-word transfer of a

packet on TDAT[31:0]. When TEOP and

TENB are asserted, the number of valid

packet data bytes on TDAT[31:0] is

specified by TMOD[1:0].

TMOD[1:0] = “00” TDAT[31:0] valid

TMOD[1:0] = “01” TDAT[31:8] valid

TMOD[1:0] = “10” TDAT[31:16] valid

TMOD[1:0] = “11” TDAT[31:24] valid

TMOD [1:0] is sampled on the rising edge

of TFCLK.

POS-PHY Transmit Start of Transfer

Active high signal indicating when the in-

band port address is present on the

TDAT[31:0] bus. When TSX is high and

TENB is high (not asserted), the value of

contained within TDAT[7:0] is the address

of the transmit FIFO to be selected.

TDAT[7:0] == 0 selects channel zero.

TDAT[7:0] == 1 selects channel one.

Subsequent data transfers on the TDAT

bus will fill the FIFO specified by this in-

band address.

If TDAT[7:0] is not 0 or 1 no channel within

the PM3386 device will be selected.

Subsequent data transfers on the TDAT

bus to address outside of 0 or 1 will be

dropped at the PL3 interface.

TSX is considered valid only when TENB is

not asserted.

TSX is sampled on the rising edge of

TFCLK.

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

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