PM3386-BI 查看數據表（PDF） - PMC-Sierra

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PM3386-BI

DUAL GIGABIT ETHERNET CONTROLLER

PMC-Sierra 

RELEASED

DATASHEET

PMC-1991129

ISSUE 7

PM3386

DUAL GIGABIT ETHERNET CONTROLLER

Signal Name

RPRTY

RMOD[0]

RMOD[1]

RSOP

Direction

Output

Output

Output

Pin No.

U3

Y1

W2

Y2

Function

POS-PHY Receive Parity

The receive parity (RPRTY) signal

indicates the parity calculated over the

RDAT bus. RPRTY is only valid when

RVAL or RSX is asserted. The PM3386

supports both odd and even parity over the

RDAT bus.

RPRTY is updated on the rising edge of

RFCLK.

POS-PHY Receive Word Modulo

RMOD[1:0] indicates the number of valid

bytes of data in RDAT[31:0]. The RMOD

bus must always be zero, except during the

last double-word transfer of a packet on

RDAT[31:0]. When REOP and RVAL are

asserted, the number of valid packet data

bytes on RDAT[31:0] is specified by

RMOD[1:0].

RMOD[1:0] = “00” RDAT[31:0] valid

RMOD[1:0] = “01” RDAT[31:8] valid

RMOD[1:0] = “10” RDAT[31:16] valid

RMOD[1:0] = “11” RDAT[31:24] valid

RMOD[1:0] is considered valid only when

RVAL and REOP are asserted.

RMOD[1:0] is updated on the rising edge of

RFCLK.

POS-PHY Receive Start of Packet

Active high signal used to delineate the

packet boundaries on the RDAT bus.

When RSOP is high, the start of the packet

is present on the RDAT bus.

RSOP is required to be present at the start

of every packet and is only considered

valid when RVAL is asserted.

RSOP is updated on the rising edge of

RFCLK.

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

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