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AT27C080-10JC 查看數據表(PDF) - Atmel Corporation

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AT27C080-10JC
Atmel
Atmel Corporation Atmel
AT27C080-10JC Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is
set to the first location. VCC is raised to 6.5V and OE/VPP is
raised to 13.0V. Each address is first programmed with one
50 µs CE pulse without verification. Then a verification
reprogramming loop is executed for each address. In the
event a byte fails to pass verification, up to 10 successive
50 µs pulses are applied with a verification after each
pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies
properly, the next address is selected until all have been
checked. OE/VPP is then lowered to VIL and VCC to 5.0V. All
bytes are read again and compared with the original data to
determine if the device passes or fails.
8
AT27C080

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