PSD9342V10JT 查看數據表（PDF） - STMicroelectronics

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PSD9342V10JT

Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM

STMicroelectronics 

PSD834F2V

KEY FEATURES

s A simple interface to 8-bit microcontrollers that

use either multiplexed or non-multiplexed

busses. The bus interface logic uses the control

signals generated by the microcontroller

automatically when the address is decoded and

a read or write is performed. A partial list of the

MCU families supported include:

– Intel 8031, 80196, 80186, 80C251, and

80386EX

– Motorola 68HC11, 68HC16, 68HC12, and

683XX

– Philips 8031 and 8051XA

– Zilog Z80 and Z8

s Internal 2 Mbit Flash memory. This is the main

Flash memory. It is divided into 8 equal-sized

blocks that can be accessed with user-specified

addresses.

s Internal secondary 256 Kbit Flash boot memory.

It is divided into 4 equal-sized blocks that can be

accessed with user-specified addresses. This

secondary memory brings the ability to execute

code and update the main Flash concurrently.

s Internal 64 Kbit SRAM. The SRAM’s contents

can be protected from a power failure by

connecting an external battery.

s CPLD with 16 Output macrocells (OMCs) and

24 Input macrocells (IMCs). The CPLD may be

used to efficiently implement a variety of logic

functions for internal and external control.

Examples include state machines, loadable

shift registers, and loadable counters.

s Decode PLD (DPLD) that decodes address for

selection of internal memory blocks.

s 27 individually configurable I/O port pins that

can be used for the following functions:

– MCU I/Os

– PLD I/Os

– Latched MCU address output

– Special function I/Os.

– 16 of the I/O ports may be configured as

open-drain outputs.

s Standby current as low as 25 µA.

s Built-in JTAG compliant serial port allows full-

chip In-System Programmability (ISP). With it,

you can program a blank device or reprogram a

device in the factory or the field.

s Internal page register that can be used to

expand the microcontroller address space by a

factor of 256.

s Internal programmable Power Management

Unit (PMU) that supports a low power mode

called Power Down Mode. The PMU can

automatically detect a lack of microcontroller

activity and put the PSD into Power-down

mode.

s Erase/Write cycles:

– Flash memory – 100,000 minimum

– PLD – 1,000 minimum

– Data Retention: 15 year minimum (for Main

Flash memory, Boot, PLD and Configuration

bits)

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