R8830 查看數據表（PDF） - RDC Semiconductor
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R8830 Datasheet PDF : 97 Pages
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RDC®
RISC DSP Controller
16-Bit Microcontroller with 8-bit external data bus
R8830
1. Features
l RISC architecture
l Static Design & Synthesizable design
l Bus interface
- Multiplexed address and Data bus which
compatible with 80C188 microprocessor
- Supports nonmultiplexed address bus [A19 : A0]
- 1M byte memory address space
- 64K byte I/O space
l Software compatible with the 80C186
l Support two Asynchronous serial channel with
hardware handshaking signals.
l Support serial port with DMA transfers
l Supports 32 PIO pins
l PSRAM (Pseudo static RAM) interface with
auto-refresh control
l Three independent 16-bit timers and one
independent watchdog timer
l The Interrupt controller with seven maskable
external interrupts and one nonmaskable
external interrupt
l Two independent DMA channels
l Programmable chip-select logic for Memory
or I/O bus cycle decoder
l Programmable wait-state generator
2. Block Diagram
CLKOUTA
INT2/INTA0
INT1/SELECT
INT3/INTA1/IRQ
CLKOUTB INT6-INT4
INT0 NMI
X1 X2
Clock and
VCC
Power
GND
Management
Interrupt
Control Unit
RST
TMROUT0 TMROUT1
TMRIN0 TMRIN1
Timer Control
Unit
LCS/ONCE0
MCS3/RFSH
MCS2-MCS0
UCS/ONCE1
PCS3-PCS0
PCS5/A1
PCS6/A2
Chip
Select
Unit
PSRAM
Control
Unit
ARDY
SRDY
S2~S0
DT/R
DEN
HOLD
HLDA
S6/CLKDIV2
UZI
Refresh
Control
Unit
Bus
Interface
Unit
Instruction
Queue (64bits)
Instruction
Decoder
Control Signal
Register
File
General,
Segment,
Eflag Register
Micro
ROM
EA / LA
Address
ALU
(Special,
Logic,
Adder,
BSF)
Execution
Unit
DRQ0 DRQ1
DMA
Unit
PIO
Unit
Asynchro-
nous Serial
Port0
Asynchro-
nous Serial
Port1
RTS0/RTR0
CTS0/ENRX0
TXD0
RXD0
RTS1/RTR1
CTS1/ENRX1
TXD1
RXD1
A19~A0
AD7~AD0 ALE
AO15~AO8
RD
WB
WR
RFSH2/ADEN
RDC Semiconductor Co.
Subject to change without notice
4
Rev:1.4
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