R8A66170SP 查看數據表（PDF） - Renesas Electronics
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R8A66170SP Datasheet PDF : 21 Pages
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R8A66170DD/SP
FUNCTION
Four separate 16-bit prescalers and 16-bit PWM counters can be separately programmed by the control instruction from
the MPU.
The output is made in one of three modes (Mode 0, Mode 1, and Mode 2).
In Mode0, setting only the value of H width repeatedly outputs the set pulse width.
In Mode1, setting only the value of H width outputs one shot of the pulse width set by trigger input.
In Mode2, setting both H width and L width repeatedly outputs the set pulse width.
BLOCK DIAGRAM
X1 14
X2 13
RESET 15
WR 9
C / D 10
CS 11
D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
16-bit
prescaler
Register
another channel
Vcc
24
Selector
16-bit, 8-bit
PWM counter
Inverter
circuit
H register
L register
F/F
Buffer
12
GND
TRG
PWM
PIN DESCRIPTIONS
Pin name
Description
I/O
Function
RESET
D0~D7
WR
C/D
CS
X1
X2
TRG1~
TRG4
PWM1~
PWM4
Reset input
Data bus input
Write control input
Command/Data
control input
Chip select
input
Clock input
Clock output
Trigger input
PWM output
Input
Input
Input
Input
Input
Input
Output
Input
Output
Clears the command register and the flip-flop at “L”.
Inputs the data from MPU over the 8-bit data bus.
Writes the data on data bus to the control register or data register when its state changes
from “L” to “H” of rising edge.
The Data on data bus is regarded as a command at “H” level, and as data at “L” level.
Communication with MPU is enabled at “L” level. Any control from MPU is ignored at “H”
level.
Input and output to the built-in clock generator circuit. By providing a crystal resonator
between X1 and X2, sets the frequency.
To make external clock input, connect the clock source to X1 pin and leave X2 pin open.
These are used when external trigger is selected in mode setting. These should be set to
“L” level when not in use.
PWM output pins. Outputs become the high-impedance state after reset is inputted or
after disable is specified by command 3.
D0 of command 1 allows the selection of output polarity.
REJ03F0272-0100 Rev.1.00 Apr.01.2008
Page 2 of 20
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