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R8A66174SP 查看數據表(PDF) - Renesas Electronics

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产品描述 (功能)
生产厂家
R8A66174SP
Renesas
Renesas Electronics Renesas
R8A66174SP Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
R8A66174SP
TIMING REQUIREMENTS (Ta=-40~85oC, Vcc=4.5~5.5V or 3.0~3.6V)
Symbol
Parameter
Test condition
Limits for 5.0V
Min
Typ
Max
tw(Φ)
Clock pulse width
50
tw(/W)
Write pulse width
100
tw(/R)
Reset pulse width
100
tsu(D-/W) Data setup time before write
50
th(/W-D)
Data hold time after write
0
tsu(A-/W) Address setup time before write
0
th(/W-A)
Address hold time after write
0
trec(/W)
Write recovery time
100
trec(/INT-/W) Write recovery time after /INT
100
trec(/R-/W) Write recovery time after reset
100
Note 10 : Increase of the input rise time (tr) and fall time (tf) of clock input Φ may cause misoperation.
    tr, tf : These are recommended to be 20ns or less.
Limits for 3.3V
Unit
Min
Typ
Max
60
ns
120
ns
120
ns
60
ns
0
ns
0
ns
0
ns
120
ns
120
ns
120
ns
SWITCHING CHARACTERISTICS(Ta=-40~85oC, Vcc=4.5~5.5V or 3.0~3.6V)
Symbol
Parameter
Test condition
tc(Φ)
Clock Cycle
tPLH(/W-/INT) Propagation time between write and /INT
tPLH(/R-/INT) Propagation time between /RESET and /INT
tPLH(/W-/OE) Propagation time between write and /OE
tPHL(/W-/OE)
tPLH(/W-LA)
tPHL(/W-LA)
tPLH(/W-SC)
tPLH(Φ-SC)
Propagation time between write and LATCH
Propagation time between write and SCLK
Propagation time between Φ and SCLK
tPLH(Φ-SD)
tPHL(Φ-SD)
tPHL(Φ-/INT)
tPLH(/R-/OE)
tPHL(/R-LA)
tTLH
Propagation time between Φ and SDATA
Propagation time between Φ and /INT
Propagation time between /RESET and /OE
Propagation time between /RESET and LATCH
Low to high level output transition time (/INT)
tTHL
High to low level output transition time (/INT)
Low to high level output transition time
tTLH
(SCLK, SDATA, /OE, LATCH)
tTHL
High to low level output transition time
(SCLK, SDATA, /OE, LATCH)
Note 11 : T=(1/Φ)×(1/division ratio) [ns]
  12 : AC test waveform
     Input pulse level
0~Vcc
     Input pulse rise time
6ns
     Input pulse fall time
6ns
     Reference voltage
Input voltage
0.5XVcc
Output voltage
0.5XVcc
CL=50pF
CL=150pF
CL=50pF
CL=150pF
Limits for 5.0V
Min
Typ
Max
100
100
100
100
100
100
100
1×T
2×T+100
100
100
100
100
100
100
25
25
25
25
Limits for 3.3V
Min
Typ
Max
単位
120
ns
120
ns
120
ns
120
ns
120
ns
120
ns
120
ns
1×T
2×T+120 ns
120
ns
120
ns
120
ns
120
ns
120
ns
120
ns
30
ns
30
ns
30
ns
30
ns
REJ03F0278-0101 Rev.1.01 Oct.06.2008
Page 8 of 11

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