RD74LVC1G125 查看數據表（PDF） - Renesas Electronics
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RD74LVC1G125 Datasheet PDF : 8 Pages
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RD74LVC1G125
Test Circuit
From Output
CL
Load circuit
RL
S1
VTT
OPEN
GND
RL
TEST
tPLH / tPHL
tZH / tHZ
tZL / tLZ
S1
OPEN
GND
VTT
VCC (V)
1.8±0.15
2.5±0.2
3.3±0.3
5.0±0.5
INPUTS
VI
VCC
VCC
VCC
VCC
tr / tf
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
Vref
VCC / 2
VCC / 2
1.5 V
VCC / 2
VTT
2 × VCC
2 × VCC
6V
2 × VCC
CL
30 pF
30 pF
50 pF
50 pF
RL
1.0 kΩ
500 Ω
500 Ω
500 Ω
∆V
0.15 V
0.15 V
0.3 V
0.3 V
VI
Input A
Vref
Vref
Output Y
t PLH
Vref
t PHL
Vref
0V
V OH
V OL
VI
Input OE
Vref
Vref
t ZL
t LZ
0V
VOH
Output Y
(Waveform – A)
Vref
t ZH
VOL + ∆V
t HZ
V OL
Output Y
(Waveform – B)
Vref
VOH – ∆V
V OH
VOL
Notes: 1. CL includes probe and jig capacitance.
2. Waveform–A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10MHz, Zo = 50 Ω.
5. The output are measured one at a time with one transition per measurement.
Rev.1.00 Apr 13, 2006 page 6 of 7
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