RT8060 查看數據表（PDF） - Richtek Technology
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RT8060 Datasheet PDF : 10 Pages
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RT8060
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
IRMS
= IOUT(MAX)
VOUT
VIN
x
VIN −1
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not result in much difference. Choose a capacitor rated at
a higher temperature than required. Several capacitors may
also be paralleled to meet size or height requirements in
the design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
ΔVOUT
≤
ΔIL x
⎡⎢⎣ESR
+
1
8fCOUT
⎤
⎥⎦
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum,
specialpolymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long term reliability.
Ceramic capacitors have excellent low ESR characteristics
but can have a high voltage coefficient and audible
piezoelectric effects. The high Q of ceramic capacitors
with trace inductance can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Output Voltage Programming
The resistive voltage divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
LX
RT8060
FB
GND
VOUT
R1
R2
Figure 1. Output Voltage Setting
For adjustable voltage mode, the output voltage is set by
an external resistive voltage divider according to the
following equation :
VOUT
=
VREF
× (1+
R1 )
R2
where VREF is the internal reference voltage (0.6V typ.)
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT, generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
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DS8060-03 April 2011
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