RT8284GSP 查看數據表（PDF） - Richtek Technology
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RT8284GSP Datasheet PDF : 15 Pages
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RT8284
packages.Special polymer capacitors offer very low ESR
value. However, it provides lower capacitance density than
other types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on SW pin when
high-side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
snubber between SW and GND and make them as close
as possible to the SW pin (see Figure 5). Another method
is adding a resistor in series with the bootstrap
capacitor, CBOOT. But this method will decrease the driving
capability to the high-side MOSFET. It is strongly
recommended to reserve the R-C snubber during PCB
layout for EMI improvement. Moreover, reducing the SW
trace area and keeping the main power in a small loop will
be helpful on EMI performance. For detailed PCB layout
guide, please refer to the section of Layout Consideration.
VIN
4.5V to 23V
Chip Enable
REN*
CEN*
CIN
10µF
2 VIN
BOOT 1
7 EN
RT8284
SW 3
8 SS
CSS
4,
0.1µF 9 (Exposed Pad)
GND
FB 5
COMP 6
RBOOT*
CBOOT
10nF
L
10µH
RS*
CS*
CC
3.3nF
RC
13k
R1
26.1k
VOUT
3.3V/2A
COUT
22µFx2
R2
10k
* : Optional
CP
NC
Figure 5. Reference Circuit with Snubber and Enable Timing Control
DS8284-01 March 2011
www.richtek.com
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