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RT9513 查看數據表(PDF) - Richtek Technology

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RT9513 Datasheet PDF : 9 Pages
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RT9513
Temperature Regulation and Thermal Protection
In order to maximize the charge rate, the RT9513 features a junction temperature regulation loop. If the power dissipation
of the IC results in a junction temperature greater than the thermal regulation threshold (125°C), the RT9513 throttles
back on the charge current in order to maintain a junction temperature around the thermal regulation threshold (125°C).
The RT9513 monitors the junction temperature, TJ, of the die and disconnects the battery from the input if TJ exceeds
125°C. This operation continues until junction temperature falls below thermal regulation threshold (125°C) by the
hysteresis level. This feature prevents the chip from damage.
Selecting the Input and Output Capacitors
In most applications, the most important is the high-frequency decoupling capacitor on the input of the RT9513. A 1uF
ceramic capacitor, placed in close proximity to input pin and GND pin is recommended. In some applications depending
on the power supply characteristics and cable length, it may be necessary to add an additional 10uF ceramic capacitor
to the input. The RT9513 requires a small output capacitor for loop stability. A 1uF ceramic capacitor placed between the
BATT pin and GND is typically sufficient.
Layout Consideration
The RT9513 is a fully integrated low cost single-cell Li- Ion battery charger ideal for portable applications. Careful PCB
layout is necessary. For best performance, place all peripheral components as close to the IC as possible. A short
connection is highly recommended. The following guidelines should be strictly followed when designing a PCB layout
for the RT9513.
` Input capacitor should be placed close to IC and connected to ground plane. The trace of input in the PCB should be
placed far away the sensitive devices or shielded by the ground.
` The GND should be connected to a strong ground plane for heat sinking and noise protection.
` The connection of RSETA should be isolated from other noisy traces. The short wire is recommended to prevent EMI and
noise coupling.
` Output capacitor should be placed close to IC and connected to ground plane to reduce noise coupling.
The capacitor should be
placed close to IC pin and
connected to ground plane.
C1
ACIN 1
NC 2
CHG_S 3
PGOOD 4
GND 5
GND
C3
10 BATT
9 NC
8 EN
7 NC
ISETA
RSETA
www.richtek.com
8
GND
The GND should be
connected to a strong
ground plane for heat
sinking and noise
protection.
The connection of RSETA
should be isolated from other
noisy traces. The short wire
is recommended to prevent
EMI and noise coupling.
Figure 2
DS9513-01 April 2011

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