RT9591 查看數據表（PDF） - Richtek Technology

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RT9591

Smart Photoflash Capacitor Charger with IGBT Driver

Richtek Technology 

Preliminary

RT9591

Input Average Current & Output Voltage

VBAT = 3.3V

CIN = 10uF

Time (1s/Div)

Figure 7

Adjustable Input Current

The RT9591 simply adjusts peak primary current by a

resistor RCS connecting to CS pin as shown in Function

Block Diagram. RCS paralleled with internal 1MΩ resistor

determines the ON time of primary NMOS.

During the ON time, the primary current ramps linearly

with a slope = VBAT/LPRI. Consequently, the current setting

resister (RCS) could be calculated as:

Ra = (IPK - PRI − 8 x 10-3 x N) x LPRI

30 x 10-12

RCS = 1M x Ra (Ω)

1M − Ra

Where IPK-PRI is the primary peak current and N is the turns

ratio of transformer.

Users could select appropriate RCS according to the battery

capability and required charging time.

Minimum IPK-PRI Limitation

The IPK - PRI setting must ≥ 430 x 10-9 x VOUT ,

N x LPRI

where 430 x 10-9 is the maximum value of minimum off

time.

If lower IPK-PRI setting limitation is required, you may change

transformer to incease N x LPRI product.

Adjustable Output Voltage

The RT9591 senses output voltage by a voltage divider

connecting to the anode of the rectifying diode during OFF

time. This eliminates power loss at voltage-sensing

circuit when charging completed. R3 to (R1+R2) ratio

determines the output voltage as shown in the application

circuit Figure1. The feedback reference voltage is 0.98V.

If VOUT = 300V, in Figure 1 Photoflash Capacitor Charger

Application according to the following equation:

R1+ R2

R1+ R2

VOUT = VFB × (1+

), so

= 305

R3

R3

R3 is recommend 1KΩ; R1 and R2 are used 150KΩ for

reducing parasitic capacitance coupling effect of FB pin.

R1 and R2 MUST be greater than 0805 size resister for

enduring secondary HV.

Lower Charging Current at Low Battery Voltage

The RT9591 integrates a voltage detector with open drain

output. This voltage detector is specially designed for

lowering peak primary current and minimizing the impact to

battery voltage at low VBAT condition as shown in Figure 8.

The voltage detector senses VBAT through a resister divider

R6 and R7 and compares it with internal 1V reference

voltage. When the sensed voltage is lower than the

reference voltage, VDOUT pin goes low and changes the

resistance connecting to CS pin and the ON time. For

example, if R6 equal 1.5MΩ and R7equal 1MΩ, VDOUT

pin change status form open to ground when VBAT voltage

under 2.5V. And current setting resister R4 and R5 can

set different resistance for different input current when VBAT

voltage under detector voltage. Figure 9 shows the lower

charging current waveform. When VBAT voltage under 2.5V,

the input average current become approximately 600mA

to 460mA.

DS9591-07 August 2007

Patent Pending

www.richtek.com

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