RT9718 查看數據表（PDF） - Richtek Technology
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RT9718 Datasheet PDF : 10 Pages
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RT9718
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Over Current Protection
Over Current Protection Blanking
Time
Over Current Recover Delay
IOCP
TOC
As RILIM = 25k
0.93 1 1.07 A
-- 180 --
μs
-- 64
--
ms
Battery Over Voltage Protection
Battery OVP Falling Threshold
Battery OVP Blanking Time
Battery OVP Recover Delay
VB Pin Leakage Current
OTP Threshold
OTP Recover Delay
Soft-Start Time
Logic
Threshold Rising
VBOVP Hysteresis
TVBOV
TSD
VVB = 4.4V
Rising
Hysteresis
4.3 4.35 4.4
V
-- 30 -- mV
4.225 --
--
V
-- 180 --
μs
--
8
--
ms
--
--
20 nA
-- 140 --
°C
-- 20 --
°C
--
8
--
ms
--
8
--
ms
EN Threshold Voltage Logic-High VIH
Logic-Low VIL
EN Internal Pull Down Resistor
WRN Output Logic Low
Sink 5mA
1.5 --
--
V
--
-- 0.4
V
100 200 400 kΩ
-- 0.35 0.8
V
WRN Output Logic High Leakage
Current
--
--
1
μA
Power MOSFET
On Resistance
RON
IOUT = 500mA, 4.3V < VIN < 6.5V
-- 200 300 mΩ
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board
of JEDEC 51-3 thermal measurement standard. The case position of θJC is on the exposed pad of the packages.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS9718-02 May 2011
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