SED1354F0A 查看數據表（PDF） - Seiko Epson Corp

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SED1354F0A

LCD Controller ICs

Seiko Epson Corp 

PIN DESCRIPTION/SPECIFICATIONS

5.2.5. LCD drive signals

In order to provide effective low-power drive for LCD

matrixes, the S1D13305 series can directly control both

the X- and Y-drivers using an enable chain.

Pin Name

Function

XD0 to XD3

4-bit X-driver (column drive) data outputs. Connect these outputs to the inputs of the X-driver

chips.

XSCL

The falling edge of XSCL latches the data on XD0 to XD3 into the input shift registers of the

X-drivers. To conserve power, this clock halts between LP and the start of the following display

line (See section 6.3.7).

XECL

The falling edge of XECL triggers the enable chain cascade for the X-drivers.

Every 16th clock pulse is output to the next X-driver.

LP latches the signal in the X-driver shift registers into the output data latches. LP is a falling-

LP

edge triggered signal, and pulses once every display line.

Connect LP to the Y-driver shift clock on modules.

WF

LCD panel AC drive output. The WF period is selected to be one of two values with SYSTEM

SET command.

YSCL

The falling edge of YSCL latches the data on YD into the input shift registers of the

Y-drivers. YSCL is not used with driver ICs which use LP as the Y-driver shift clock.

YD is the data pulse output for the Y drivers. It is active during the last line of each frame, and

YD

is shifted through the Y drivers one by one (by YSCL), to scan the display’s common

connections.

Power-down output signal. YDIS is HIGH while the display drive outputs are active.

YDIS

YDIS goes LOW one or two frames after the sleep command is written to the S1D13305

series. All Y-driver outputs are forced to an intermediate level (de-selecting the display

segments) to blank the display. In order to implement power-down operation in the LCD unit,

the LCD power drive supplies must also be disabled when the display is disabled by YDIS.

6. SPECIFICATIONS

6.1. Absolute Maximum Ratings

Parameter

Supply voltage range

Input voltage range

Power dissipation

Operating temperature range

Storage temperature range

Soldering temperature (10 seconds). See note 1.

Symbol

VDD

VIN

PD

Topg

Tstg

Tsolder

Rating

–0.3 to 7.0

–0.3 to VDD + 0.3

300

–20 to 75

–65 to 150

260

Unit

V

V

mW

°C

°C

°C

Notes:

1. The humidity resistance of the flat package may be reduced if the package is immersed in solder. Use a soldering technique

that does not heatstress the package.

2. If the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. Take

appropriate care with the power supply and the layout of the supply lines. (See section 6.2.)

3. All supply voltages are referenced to VSS = 0V.

S1D13305 Series

EPSON

7

Technical Manual

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