SED1354F0A 查看數據表（PDF） - Seiko Epson Corp
零件编号
产品描述 (功能)
生产厂家
SED1354F0A Datasheet PDF : 94 Pages
| |||
SPECIFICATIONS
6.3.3. Display memory read timing
EXTΦ0
VCE
VA0 to VA15
VR/W
VD0 to VD7
tC
tW
tCE
tASC
tCYR
tAHC
tRCS
tACV
tCEA
tW
tRCH
tCE3
tOH2
Ta = –20 to 75°C
Signal Symbol
Parameter
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
Unit
Min. Max. Min. Max.
EXT φ0 tC Clock period
100
—
125
—
ns
VCE
tW
VCE HIGH-level
pulsewidth
tCE
VCE LOW-level
pulsewidth
tC – 50 — tC – 50 —
ns
2tC – 30 — 2tC – 30 —
ns
tCYR Read cycle time
3tC
—
3tC
—
ns
VA0 to
VA15
tASC
Address setup time to
falling edge of VCE
tC – 70
— tC – 100 —
ns
tAHC
Address hold time from
falling edge of VCE
2tC – 30
—
2tC – 40
—
ns
tRCS
Read cycle setup time to
falling edge of VCE
tC – 45
—
tC – 60
—
ns
VRD
tRCH
Read cycle hold time
from rising edge of VCE
0.5tC
—
0.5tC
—
ns
tACV Address access time
— 3tC – 100 — 3tC – 115 ns
VD0 to
VD7
tCEA
tOH2
VCE access time
Output data hold time
— 2tC – 80 — 2tC – 90 ns
0
—
0
—
ns
tCE3 VCE to data off time
0
—
0
—
ns
Condition
CL = 100
pF
12
EPSON
S1D13305 Series
Technical Manual
Share Link: 