S3C72N2 查看數據表（PDF） - Samsung

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S3C72N2

The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

S3C72N2/C72N4/P72N4

13 ELECTRICAL DATA

ELECTRICAL DATA

OVERVIEW

In this section, information on S3C72N2/C72N4 electrical characteristics is presented as tables and graphics.

The information is arranged in the following order:

STANDARD ELECTRICAL CHARACTERISTICS

— Absolute maximum ratings

— D.C. electrical characteristics

— Main system clock oscillator characteristics

— Subsystem clock oscillator characteristics

— I/O capacitance

— A.C. electrical characteristics

— Operating voltage range

MISCELLANEOUS TIMING WAVEFORMS

— A.C timing measurement point

— Clock timing measurement at XIN

— Clock timing measurement at XTIN

— TCL0 timing

— Input timing for RESET

— Input timing for external interrupts

STOP MODE CHARACTERISTICS AND TIMING WAVEFORMS

— RAM data retention supply voltage in stop mode

— Stop mode release timing when initiated by RESET

— Stop mode release timing when initiated by an interrupt request

13-1

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