S3C72N8 查看數據表（PDF） - Samsung
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S3C72N8 Datasheet PDF : 40 Pages
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PRODUCT OVERVIEW
FEATURES
Memory
– 512 × 4-bit RAM
– 8 K × 8-bit ROM (S3C72N8/P72N8)
– 16 K × 8-bit ROM (S3C72N5/P72N5)
I/O Pins
– Input only: 8 pins
– I/O: 24 pins
– Output: 8 pins sharing with segment driver
outputs
LCD Controller/Driver
– Maximum 16-digit LCD direct drive capability
– 32 segment, 4 common pins
– Display modes: Static, 1/2 duty (1/2 bias),
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
8-Bit Basic Timer
– Programmable interval timer
– Watchdog timer
8-Bit Timer/Counter 0
– Programmable 8-bit timer
– External event counter
– Arbitrary clock frequency output
– Serial I/O interface clock generator
Watch Timer
– Real-time and interval time measurement
– Four frequency outputs to BUZ pin
– Clock source generation for LCD
8-Bit Serial I/O Interface
– 8-bit transmit/receive mode
– 8-bit receive only mode
– LSB-first or MSB-first transmission selectable
– Internal or external clock source
S3C72N8/P72N8/C72N5/P72N5
Bit Sequential Carrier
– Support 16-bit serial data transfer in arbitrary
format
Interrupts
– Three internal vectored interrupts
– Three external vectored interrupts
– Two quasi-interrupts
Memory-Mapped I/O Structure
– Data memory bank 15
Two Power-Down Modes
– Idle mode (only CPU clock stops)
– Stop mode (main or sub system oscillation stops)
Oscillation Sources
– Crystal, ceramic, or RC for main system clock
– Crystal or external oscillator for subsystem clock
– Main system clock frequency: 4.19 MHz (typical)
– Subsystem clock frequency: 32.768 kHz
– CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
– 0.95, 1.91, 15.3 µs at 4.19 MHz (main)
– 122 µs at 32.768 kHz (subsystem)
Operating Temperature
– – 40 °C to 85 °C
Operating Voltage Range
– 1.8 V to 5.5 V
Package Type
– 80-pin QFP
1-2
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