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SA8027DH 查看數據表(PDF) - Philips Electronics

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SA8027DH Datasheet PDF : 22 Pages
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Philips Semiconductors
2.5 GHz low voltage, low power
RF fractional-N/IF integer frequency synthesizer
Product data
SA8027
GENERAL DESCRIPTION
The SA8027 BICMOS device integrates programmable dividers,
charge pumps and phase comparators to implement phase-locked
loops. The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 2.5 GHz.
The synthesizer has fully programmable main, auxiliary and
reference dividers. All divider ratios are supplied via a 3-wire serial
programming bus. The main divider is a fractional-N divider with
programmable integer ratios from 512 to 65535.
Separate power and ground pins are provided to the charge pumps
and digital circuits. The ground pins should be externally connected
to prevent large currents from flowing across the die and causing
damage. VDDCP must be equal to or greater than VDD.
The charge pump current (gain) is fully programmable, while ISET is
set by an external resistance at the RSET pin (refer to section 1.5,
Main Output Charge Pumps and Fractional Compensation
Currents). The phase/frequency detector charge pump outputs allow
for implementing a passive loop filter.
FEATURES
Low phase noise
Low power
Fully programmable main and auxiliary dividers
Programmable Normal & Integral charge pumps outputs
Fast Locking Adaptive mode design
Internal fractional spurious compensation
Hardware and software power down
Split supply for VDD and VDDCP
Loop filter bandwidth programmability
APPLICATIONS
500 to 2500 MHz wireless equipment
Cellular phones (all standards)
WLAN
Portable battery-powered radio equipment.
LOCK 1
20 PON
TEST 2
19 STROBE
VDD 3
GND 4
18 DATA
17 CLOCK
RFin+ 5
16 REFin+
RFin– 6
15 REFin–
GNDCP 7
PHP 8
PHI 9
GNDCP 10
14 RSET
13 VDDCP
12 AUXin
11 PHA
SR01649
Figure 1. TSSOP20 Pin Configuration
VDDPre
GND
GNDPre
RFin+
RFin–
GNDCP
1 24 23 22 21 20 19
2
18
3
17
4
TOP VIEW
16
5
15
6
14
7 8 9 10 11 12 13
CLOCK
REFin+
REFin–
RSET
VDDCP
N/C
SR02176
Figure 2. HBCC24 Pin configuration
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDD
VDDCP
IDDCP+IDD
IDDCP+IDD
fVCO
fAUX
fREF
fPC
Tamb
Supply voltage
Analog supply voltage
Supply current
Total supply current in power-down mode
Input frequency
Input frequency
Crystal reference input frequency
Maximum phase comparator frequency
Operating ambient temperature
CONDITIONS
VDDCP w VDD
Main and Aux. on
MIN.
2.7
2.7
500
100
5
–40
TYP.
7.7
1
MAX.
3.6
3.6
2500
550
40
4
+85
UNIT
V
V
mA
µA
MHz
MHz
MHz
MHz
°C
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
SA8027DH
TSSOP20
Plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SA8027W
HBCC24
Plastic, heatsink bottom chip carrier; 24 terminals; body 4 x 4 x 0.65 mm (Note 1)
NOTE:
1. The SA8027W will be released for production Q2, 2001.
VERSION
SOT360-1
SOT564-1
2001 Aug 21
2
853–2244 26947

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