74HCT7030U 查看數據表（PDF） - Philips Electronics

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74HCT7030U

9-bit x 64-word FIFO register; 3-state

Philips Electronics 

Philips Semiconductors

9-bit x 64-word FIFO register; 3-state

Product specification

74HC/HCT7030

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/ tPLH

fmax

CI

CP

propagation delay

MR to DIR and DOR

SO to Qn

maximum clock frequency

SI and SO

input capacitance

power dissipation capacitance per package

CL = 15 pF; VCC = 5 V

notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

TYPICAL

UNIT

HC HCT

21

26

ns

36

40

ns

33

29

MHz

3.5 3.5 pF

660 660 pF

December 1990

3

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