SAA6713H 查看數據表（PDF） - Philips Electronics
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SAA6713H Datasheet PDF : 103 Pages
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Philips Semiconductors
XGA dual input flat panel controller
Product specification
SAA6713H
SYMBOL
VSSD(IC5)
VDDD(IC5)
VSSD(EP8)
VDDD(EP8)
CSG3
CSG4/A1
CSG5
CSG6
CSG7
VSSD(EP9)
VDDD(EP9)
CSG8
CSG9
VCLK
INVA
INVB
OUTEN
PWM
VSYNC
HSYNC
VSSD(EP10)
VDDD(EP10)
VSSD(IC6)
VDDD(IC6)
VSS(PLL)(P)
VDD(PLL)(P)
n.c.
VSSA(PLL)(S)
VDDA(PLL)(S)
VSSD(PLL)(S)
VDDD(PLL)(S)
TRST
TCK
TDI
TMS
TDO
PIN(1)
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
TYPE
−
−
−
−
O
I/O
O
O
O
−
−
O
O
I/O
O
O
O
O
I/O
I
−
−
−
−
−
−
−
−
−
−
−
I
I
I
I
O
DESCRIPTION
internal digital core supply ground 5
internal digital core supply voltage 5 (2.5 V)
external digital pad supply ground 8
external digital pad supply voltage 8 (3.3 V)
control signal generator 3 output
control signal generator 4 output (CSG4) or I2C-bus slave address input, latched
via hardware reset (A1)
control signal generator 5 output
control signal generator 6 output
control signal generator 7 output
external digital pad supply ground 9
external digital pad supply voltage 9 (3.3 V)
control signal generator 8 output
control signal generator 9 output
sample clock input or output; configurable as output if generated internally
data inversion output of ports A, B and C
data inversion output of ports D, E and F
output enable status output
pulse width modulation for control of backlight brightness output
vertical sync input or output; configurable as output if decoded from DVI or
composite sync
horizontal and composite sync input
external digital pad supply ground 10
external digital pad supply voltage 10 (3.3 V)
internal digital core supply ground 6
internal digital core supply voltage 6 (2.5 V)
supply ground for panel clock phase locked loop
supply voltage for panel clock phase locked loop (2.5 V)
do not connect
analog supply ground for sample clock phase locked loop
analog supply voltage for sample clock phase locked loop (2.5 V)
digital supply ground for sample clock phase locked loop
digital supply voltage for sample clock phase locked loop (2.5 V)
test reset input for boundary scan test (active LOW); note 2
test clock input for boundary scan test; note 2
test data input for boundary scan test; note 2
test mode select input for boundary scan test or scan test; note 2
test data output for boundary scan test
2004 Apr 05
9
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