SC1189 查看數據表（PDF） - Semtech Corporation

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SC1189

Programmable Synchronous DC/DC Converter, Dual LDO Controller

Semtech Corporation 

SC1189

POWER MANAGEMENT

Component Selection

SWITCHING SECTION

OUTPUT CAPACITORS - Selection begins with the most

critical component. Because of fast transient load current

requirements in modern microprocessor core supplies, the

output capacitors must supply all transient load current

requirements until the current in the output inductor ramps

up to the new level. Output capacitor ESR is therefore one

of the most important criteria. The maximum ESR can be

simply calculated from:

RESR

≤

Vt

It

Where

Vt = Maximum transient voltage excursion

It = Transient current step

For example, to meet a 100mV transient limit with a 10A

load step, the output capacitor ESR must be less than

10mΩ. To meet this kind of ESR level, there are three

available capacitor technologies.

Technology

Each Cap.

C

ESR

(µF) (mΩ)

Qty.

Rqd.

Total

C

ESR

(µF) (mΩ)

Low ESR Tantalum 330 60

6 2000 10

OS-CON

330 25

3 990 8.3

Low ESR Aluminum 1500 44

5 7500 8.3

The choice of which to use is simply a cost/performance

issue, with Low ESR Aluminum being the cheapest, but

taking up the most space.

INDUCTOR - Having decided on a suitable type and value

of output capacitor, the maximum allowable value of in-

ductor can be calculated. Too large an inductor will pro-

duce a slow current ramp rate and will cause the output

capacitor to supply more of the transient load current

for longer - leading to an output voltage sag below the

ESR excursion calculated above.

The maximum inductor value may be calculated from:

L

≤

RESR

It

C

⋅

VA

where VA is the lesser of VO or (VIN − VO )

The calculated maximum inductor value assumes 100%

and 0% duty cycle capability, so some allowance must be

made. Choosing an inductor value of 50 to 75% of the

calculated maximum will guarantee that the inductor cur-

rent will ramp fast enough to reduce the voltage dropped

across the ESR at a faster rate than the capacitor sags,

hence ensuring a good recovery from transient with no

additional excursions.

We must also be concerned with ripple current in the out-

put inductor and a general rule of thumb has been to

allow 10% of maximum output current as ripple current.

Note that most of the output voltage ripple is produced by

the inductor ripple current flowing in the output capacitor

ESR. Ripple current can be calculated from:

ILRIPPLE

=

VIN

4 ⋅ L ⋅ fOSC

Ripple current allowance will define the minimum permit-

ted inductor value.

POWER FETS - The FETs are chosen based on several

criteria, with probably the most important being power

dissipation and power handling capability.

TOP FET - The power dissipation in the top FET is a combi-

nation of conduction losses, switching losses and bottom

FET body diode recovery losses.

a) Conduction losses are simply calculated as:

PCOND = IO2 ⋅ RDS(on) ⋅ δ

where

δ = duty

cycle

≈

VO

VIN

b) Switching losses can be estimated by assuming a switch-

ing time, if we assume 100ns then:

PSW = IO ⋅ VIN ⋅10−2

or more generally,

PSW

=

IO

⋅ VIN ⋅ (tr +

4

tf ) ⋅ fOSC

c) Body diode recovery losses are more difficult to esti-

mate, but to a first approximation, it is reasonable to as-

sume that the stored charge on the bottom FET body di-

ode will be moved through the top FET as it starts to turn

on. The resulting power dissipation in the top FET will be:

PRR = QRR ⋅ VIN ⋅ fOSC

To a first order approximation, it is convenient to only con-

 2007 Semtech Corp.

9

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