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SC2463TSTRT

High Performance Quad Output Switching Regulator

Semtech Corporation 

SC2463

POWER MANAGEMENT

Applications Information (Cont.)

When two channels with a common input are interleaved,

the total DC input current is simply the sum of the

individual DC input currents. The combined input current

waveform depends on duty ratio and the output current

waveform. Assuming that the output current ripple is

small, the following formula can be used to estimate the

RMS value of the ripple current in the input capacitor.

Let the duty ratio and output current of Channel 1 and

Channel 2 be D1, D2 and Io1, Io2, respectively.

If D1<0.5 and D2<0.5, then

50

40

Cg(100, Rds)

Cg(200, Rds)

Cg(500, Rds) 20

1 00

5

10

15

20

1

Rds

20

On-resistance (mOhm)

FOM:100*10^{-12}

FOM:200*10^{-12}

FOM:500*10^{-12}

ICin ≈ D1Io12 + D2Io22 .

If D1>0.5 and (D1-0.5) < D2<0.5, then

ICin ≈ 0.5Io12 + (D1 − 0.5)(Io1 + Io2 )2 + (D2 − D1 + 0.5)Io22 .

If D1>0.5 and D2 < (D1-0.5) < 0.5, then

ICin ≈ 0.5Io12 + D2 (Io1 + Io2 )2 + (D1 − D2 − 0.5)Io22 .

Figure 5. Figure of Merit curves

MOSFET selection also depends on applications. In many

applications, either switching loss or conduction loss

dominates for a particular MOSFET. For synchronous buck

converters with high input to output voltage ratios, the

top MOSFET is hard switched but conducts with very low

duty cycle. The bottom switch conducts at high duty cycle

but switches at near zero voltage. For such applications,

MOSFETs with low Cg are used for the top switch and

MOSFETs with low Rds(on) are used for the bottom switch.

If D >0.5 and D > 0.5, then

1

2

ICin ≈ (D1 + D2 − 1)(Io1 + Io2 )2 + (1− D2 )Io12 + (1− D1)Io22 .

Choosing Power MOSFETs

Main considerations in selecting the MOSFETs are power

dissipation, cost and packaging. Switching losses and

conduction losses of the MOSFETs are directly related to

the total gate charge (C ) and channel on-resistance

g

(Rds(on)). In order to judge the performance of MOSFETs,

the product of the total gate charge and on-resistance is

used as a figure of merit (FOM). Transistors with the same

FOM follow the same curve in Figure 5.

The closer the curve is to the origin, the lower is the FOM.

This means lower switching loss or lower conduction loss

or both. It may be difficult to find MOSFETs with both low

Cg and low Rds(on. Usually a trade-off between Rds(on and

Cg has to be made.

MOSFET power dissipation consists of

a) conduction loss due to the channel resistance Rds(on),

b) switching loss due to the switch rise time tr and fall

time tf, and

c) the gate loss due to the gate resistance RG.

Top Switch:

The RMS value of the top switch current is calculated as

IQ1,rms = Io

D(1 +

δ2

12

).

The conduction losses are then

Ptc

=

I2

Q1,rms

Rds(on).

R varies with temperature and gate-source voltage.

ds(on)

Curves showing R variations can be found in

ds(on)

manufacturers’ data sheet. From the Si4860

datasheet, Rds(on) is less than 8mW when Vgs is greater

than 10V. However R increases by 50% as the

ds(on)

junction temperature increases from 25oC to 110oC.

The switching losses can be estimated using the simple

formula

 2007 Semtech Corp.

15

www.semtech.com

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